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https://github.com/yuzu-emu/unicorn.git
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target/arm: [tcg] Port to tb_stop
Incrementally paves the way towards using the generic instruction translation loop. Backports commit 70d3c035ae36a2c5c0f991ba958526127c92bb67 from qemu
This commit is contained in:
Lluís Vilanova
Lioncash
parent
665192d96f
commit
d8def0cdb5
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@ -12271,117 +12271,16 @@ static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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dc->base.pc_next = dc->pc;
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dc->base.pc_next = dc->pc;
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}
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}
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/* generate intermediate code for basic block 'tb'. */
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static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
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void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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{
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{
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TCGContext *tcg_ctx = cs->uc->tcg_ctx;
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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CPUARMState *env = cs->env_ptr;
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TCGContext *tcg_ctx = cpu->uc->tcg_ctx;
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DisasContext dc1, *dc = &dc1;
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int max_insns;
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bool block_full = false;
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/* generate intermediate code */
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if (dc->base.tb->cflags & CF_LAST_IO && dc->condjmp) {
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/* FIXME: This can theoretically happen with self-modifying code. */
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/* The A64 decoder has its own top level loop, because it doesn't need
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cpu_abort(cpu, "IO on conditional branch instruction");
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* the A32/T32 complexity to do with conditional execution/IT blocks/etc.
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*/
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if (ARM_TBFLAG_AARCH64_STATE(tb->flags)) {
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gen_intermediate_code_a64(&dc->base, cs, tb);
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return;
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}
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}
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dc->base.tb = tb;
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dc->base.pc_first = dc->base.tb->pc;
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dc->base.pc_next = dc->base.pc_first;
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dc->base.is_jmp = DISAS_NEXT;
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dc->base.num_insns = 0;
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dc->base.singlestep_enabled = cs->singlestep_enabled;
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max_insns = tb->cflags & CF_COUNT_MASK;
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if (max_insns == 0) {
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max_insns = CF_COUNT_MASK;
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}
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if (max_insns > TCG_MAX_INSNS) {
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max_insns = TCG_MAX_INSNS;
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}
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max_insns = arm_tr_init_disas_context(&dc->base, cs, max_insns);
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tcg_clear_temp_count();
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// Unicorn: early check to see if the address of this block is the until address
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if (tb->pc == env->uc->addr_end) {
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// imitate WFI instruction to halt emulation
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gen_tb_start(tcg_ctx, tb);
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dc->base.is_jmp = DISAS_WFI;
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goto tb_end;
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}
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// Unicorn: trace this block on request
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, dc->base.pc_first)) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = dc->base.pc_first;
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env->uc->size_arg = tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].args;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, dc->base.pc_first);
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} else {
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env->uc->size_arg = -1;
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}
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gen_tb_start(tcg_ctx, tb);
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arm_tr_tb_start(&dc->base, cs);
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do {
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dc->base.num_insns++;
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arm_tr_insn_start(&dc->base, cs);
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if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
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CPUBreakpoint *bp;
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QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
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if (bp->pc == dc->base.pc_next) {
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if (arm_tr_breakpoint_check(&dc->base, cs, bp)) {
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break;
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}
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}
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}
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if (dc->base.is_jmp > DISAS_TOO_MANY) {
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break;
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}
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}
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//if (dc->base.num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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// gen_io_start();
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//}
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arm_tr_translate_insn(&dc->base, cs);
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if (tcg_check_temp_count()) {
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fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n",
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dc->pc);
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}
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if (!dc->base.is_jmp && (tcg_op_buf_full(tcg_ctx) || //singlestep || // Unicorn: commented out
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dc->base.num_insns >= max_insns)) {
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dc->base.is_jmp = DISAS_TOO_MANY;
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}
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} while (!dc->base.is_jmp);
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if (tb->cflags & CF_LAST_IO) {
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if (dc->condjmp) {
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/* FIXME: This can theoretically happen with self-modifying
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code. */
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cpu_abort(cs, "IO on conditional branch instruction");
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}
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//gen_io_end();
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}
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/* if too long translation, save this info */
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if (tcg_op_buf_full(tcg_ctx) || dc->base.num_insns >= max_insns) {
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block_full = true;
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}
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tb_end:
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/* At this stage dc->condjmp will only be set when the skipped
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/* At this stage dc->condjmp will only be set when the skipped
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instruction was a conditional branch or trap, and the PC has
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instruction was a conditional branch or trap, and the PC has
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already been written. */
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already been written. */
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@ -12485,10 +12384,119 @@ tb_end:
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gen_goto_tb(dc, 1, dc->pc);
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gen_goto_tb(dc, 1, dc->pc);
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}
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}
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}
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}
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}
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/* generate intermediate code for basic block 'tb'. */
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void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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{
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DisasContext dc1, *dc = &dc1;
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CPUARMState *env = cs->env_ptr;
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TCGContext *tcg_ctx = cs->uc->tcg_ctx;
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int max_insns;
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/* generate intermediate code */
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/* The A64 decoder has its own top level loop, because it doesn't need
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* the A32/T32 complexity to do with conditional execution/IT blocks/etc.
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*/
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if (ARM_TBFLAG_AARCH64_STATE(tb->flags)) {
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gen_intermediate_code_a64(&dc->base, cs, tb);
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return;
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}
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dc->base.tb = tb;
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dc->base.pc_first = dc->base.tb->pc;
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dc->base.pc_next = dc->base.pc_first;
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dc->base.is_jmp = DISAS_NEXT;
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dc->base.num_insns = 0;
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dc->base.singlestep_enabled = cs->singlestep_enabled;
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max_insns = tb->cflags & CF_COUNT_MASK;
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if (max_insns == 0) {
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max_insns = CF_COUNT_MASK;
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}
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if (max_insns > TCG_MAX_INSNS) {
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max_insns = TCG_MAX_INSNS;
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}
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max_insns = arm_tr_init_disas_context(&dc->base, cs, max_insns);
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gen_tb_start(tcg_ctx, tb);
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tcg_clear_temp_count();
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arm_tr_tb_start(&dc->base, cs);
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// Unicorn: early check to see if the address of this block is the until address
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if (tb->pc == env->uc->addr_end) {
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// imitate WFI instruction to halt emulation
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gen_tb_start(tcg_ctx, tb);
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dc->base.is_jmp = DISAS_WFI;
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goto tb_end;
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}
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// Unicorn: trace this block on request
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, dc->base.pc_first)) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = dc->base.pc_first;
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env->uc->size_arg = tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].args;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, dc->base.pc_first);
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} else {
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env->uc->size_arg = -1;
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}
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do {
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dc->base.num_insns++;
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arm_tr_insn_start(&dc->base, cs);
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if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
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CPUBreakpoint *bp;
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QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
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if (bp->pc == dc->base.pc_next) {
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if (arm_tr_breakpoint_check(&dc->base, cs, bp)) {
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break;
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}
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}
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}
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if (dc->base.is_jmp > DISAS_TOO_MANY) {
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break;
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}
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}
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// Unicorn: commented out
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#if 0
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if (dc->base.num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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gen_io_start();
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}
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#endif
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arm_tr_translate_insn(&dc->base, cs);
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if (tcg_check_temp_count()) {
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fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n",
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dc->pc);
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}
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if (!dc->base.is_jmp && (tcg_op_buf_full(tcg_ctx) || // singlestep || // Unicorn: commented out
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dc->base.num_insns >= max_insns)) {
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dc->base.is_jmp = DISAS_TOO_MANY;
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env->uc->block_full = true;
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}
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} while (!dc->base.is_jmp);
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// Unicorn: if'd out
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#if 0
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if (dc->base.tb->cflags & CF_LAST_IO) {
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gen_io_end();
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}
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#endif
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tb_end:
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arm_tr_tb_stop(&dc->base, cs);
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gen_tb_end(tcg_ctx, tb, dc->base.num_insns);
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gen_tb_end(tcg_ctx, tb, dc->base.num_insns);
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// Unicorn: commented out
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// Unicorn: if'd out
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#if 0
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#if 0
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
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qemu_log_in_addr_range(dc->base.pc_first)) {
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qemu_log_in_addr_range(dc->base.pc_first)) {
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@ -12504,8 +12512,6 @@ tb_end:
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tb->size = dc->pc - dc->base.pc_first;
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tb->size = dc->pc - dc->base.pc_first;
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tb->icount = dc->base.num_insns;
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tb->icount = dc->base.num_insns;
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env->uc->block_full = block_full;
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}
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}
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#if 0
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#if 0
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