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target-mips: Use CPU_LOG_INT for logging related to interrupts
There are now no unconditional uses of qemu_log in the subdirectory. Backports commit c85570163bdf1ba29cb52a63f22ff1c48f1b9398 from qemu
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6f66fb4bd5
commit
dafc44c0a5
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@ -126,10 +126,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
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/* effective address (modified for KVM T&E kernel segments) */
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/* effective address (modified for KVM T&E kernel segments) */
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target_ulong address = real_address;
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target_ulong address = real_address;
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#if 0
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qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
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#endif
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#define USEG_LIMIT 0x7FFFFFFFUL
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#define USEG_LIMIT 0x7FFFFFFFUL
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#define KSEG0_BASE 0x80000000UL
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#define KSEG0_BASE 0x80000000UL
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#define KSEG1_BASE 0xA0000000UL
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#define KSEG1_BASE 0xA0000000UL
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@ -213,10 +209,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
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ret = TLBRET_BADADDR;
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ret = TLBRET_BADADDR;
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}
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}
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}
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}
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#if 0
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qemu_log(TARGET_FMT_lx " %d %d => %" HWADDR_PRIx " %d (%d)\n",
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address, rw, access_type, *physical, *prot, ret);
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#endif
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return ret;
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return ret;
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}
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}
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@ -472,14 +464,16 @@ void mips_cpu_do_interrupt(CPUState *cs)
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int cause = -1;
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int cause = -1;
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const char *name;
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const char *name;
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if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) {
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if (qemu_loglevel_mask(CPU_LOG_INT)
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&& cs->exception_index != EXCP_EXT_INTERRUPT) {
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if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) {
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if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) {
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name = "unknown";
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name = "unknown";
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} else {
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} else {
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name = excp_names[cs->exception_index];
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name = excp_names[cs->exception_index];
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}
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}
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qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n",
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qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx
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" %s exception\n",
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__func__, env->active_tc.PC, env->CP0_EPC, name);
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__func__, env->active_tc.PC, env->CP0_EPC, name);
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}
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}
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if (cs->exception_index == EXCP_EXT_INTERRUPT &&
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if (cs->exception_index == EXCP_EXT_INTERRUPT &&
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@ -727,11 +721,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
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env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
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env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
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break;
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break;
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default:
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default:
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qemu_log("Invalid MIPS exception %d. Exiting\n", cs->exception_index);
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abort();
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printf("Invalid MIPS exception %d. Exiting\n", cs->exception_index);
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exit(1);
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}
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}
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if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) {
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if (qemu_loglevel_mask(CPU_LOG_INT)
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&& cs->exception_index != EXCP_EXT_INTERRUPT) {
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qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
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qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
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" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
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" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
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__func__, env->active_tc.PC, env->CP0_EPC, cause,
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__func__, env->active_tc.PC, env->CP0_EPC, cause,
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