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target-mips: Use CPU_LOG_INT for logging related to interrupts

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There are now no unconditional uses of qemu_log in the subdirectory.

Backports commit c85570163bdf1ba29cb52a63f22ff1c48f1b9398 from qemu
This commit is contained in:
Richard Henderson 2018-02-10 21:12:31 -05:00 committed by Lioncash
parent 6f66fb4bd5
commit dafc44c0a5
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 11 additions and 18 deletions
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21
qemu/target-mips/helper.c
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@ -126,10 +126,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
/* effective address (modified for KVM T&E kernel segments) */ /* effective address (modified for KVM T&E kernel segments) */
target_ulong address = real_address; target_ulong address = real_address;
#if 0
qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
#define USEG_LIMIT 0x7FFFFFFFUL #define USEG_LIMIT 0x7FFFFFFFUL
#define KSEG0_BASE 0x80000000UL #define KSEG0_BASE 0x80000000UL
#define KSEG1_BASE 0xA0000000UL #define KSEG1_BASE 0xA0000000UL
@ -213,10 +209,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
ret = TLBRET_BADADDR; ret = TLBRET_BADADDR;
} }
} }
#if 0
qemu_log(TARGET_FMT_lx " %d %d => %" HWADDR_PRIx " %d (%d)\n",
address, rw, access_type, *physical, *prot, ret);
#endif
return ret; return ret;
} }
@ -472,14 +464,16 @@ void mips_cpu_do_interrupt(CPUState *cs)
int cause = -1; int cause = -1;
const char *name; const char *name;
if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) { if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) { if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) {
name = "unknown"; name = "unknown";
} else { } else {
name = excp_names[cs->exception_index]; name = excp_names[cs->exception_index];
} }
qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx
" %s exception\n",
__func__, env->active_tc.PC, env->CP0_EPC, name); __func__, env->active_tc.PC, env->CP0_EPC, name);
} }
if (cs->exception_index == EXCP_EXT_INTERRUPT && if (cs->exception_index == EXCP_EXT_INTERRUPT &&
@ -727,11 +721,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC); env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
break; break;
default: default:
qemu_log("Invalid MIPS exception %d. Exiting\n", cs->exception_index); abort();
printf("Invalid MIPS exception %d. Exiting\n", cs->exception_index);
exit(1);
} }
if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) { if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
__func__, env->active_tc.PC, env->CP0_EPC, cause, __func__, env->active_tc.PC, env->CP0_EPC, cause,