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target/arm: Change the type of vfp.regs
Backports commit 3f68b8a5a6862f856524bb347bf348ae364dd43c from qemu
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parent
ef07c136b6
commit
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@ -286,7 +286,7 @@ typedef struct CPUARMState {
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* the two execution states, and means we do not need to explicitly
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* the two execution states, and means we do not need to explicitly
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* map these registers when changing states.
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* map these registers when changing states.
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*/
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*/
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float64 regs[64];
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uint64_t regs[64];
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uint32_t xregs[16];
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uint32_t xregs[16];
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/* We store these fpcsr fields separately for convenience. */
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/* We store these fpcsr fields separately for convenience. */
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@ -144,12 +144,12 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
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if (flags & CPU_DUMP_FPU) {
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if (flags & CPU_DUMP_FPU) {
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int numvfpregs = 32;
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int numvfpregs = 32;
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for (i = 0; i < numvfpregs; i += 2) {
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for (i = 0; i < numvfpregs; i += 2) {
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uint64_t vlo = float64_val(env->vfp.regs[i * 2]);
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uint64_t vlo = env->vfp.regs[i * 2];
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uint64_t vhi = float64_val(env->vfp.regs[(i * 2) + 1]);
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uint64_t vhi = env->vfp.regs[(i * 2) + 1];
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cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 " ",
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cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 " ",
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i, vhi, vlo);
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i, vhi, vlo);
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vlo = float64_val(env->vfp.regs[(i + 1) * 2]);
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vlo = env->vfp.regs[(i + 1) * 2];
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vhi = float64_val(env->vfp.regs[((i + 1) * 2) + 1]);
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vhi = env->vfp.regs[((i + 1) * 2) + 1];
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cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 "\n",
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cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 "\n",
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i + 1, vhi, vlo);
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i + 1, vhi, vlo);
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}
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}
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@ -11731,7 +11731,7 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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numvfpregs += 16;
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numvfpregs += 16;
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}
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}
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for (i = 0; i < numvfpregs; i++) {
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for (i = 0; i < numvfpregs; i++) {
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uint64_t v = float64_val(env->vfp.regs[i]);
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uint64_t v = env->vfp.regs[i];
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cpu_fprintf(f, "s%02d=%08x s%02d=%08x d%02d=%016" PRIx64 "\n",
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cpu_fprintf(f, "s%02d=%08x s%02d=%08x d%02d=%016" PRIx64 "\n",
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i * 2, (uint32_t)v,
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i * 2, (uint32_t)v,
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i * 2 + 1, (uint32_t)(v >> 32),
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i * 2 + 1, (uint32_t)(v >> 32),
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