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target/arm: Relax r13 restriction for ldrex/strex for v8.0

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Armv8-A removes UNPREDICTABLE for R13 for these cases.

Backports commit d46ad79efac7aaf9f0eb9f5a96a576e9f39200e0 from qemu
This commit is contained in:
Richard Henderson 2019-11-21 16:18:59 -05:00 committed by Lioncash
parent fa7a6a5d91
commit df5929cb69
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 4 deletions
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12
qemu/target/arm/translate.c
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@ -9206,15 +9206,17 @@ static bool op_strex(DisasContext *s, arg_STREX *a, MemOp mop, bool rel)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 addr;
/* Some cases stopped being UNPREDICTABLE in v8A (but not v8M) */
bool v8a = ENABLE_ARCH_8 && !arm_dc_feature(s, ARM_FEATURE_M);
/* We UNDEF for these UNPREDICTABLE cases. */
if (a->rd == 15 || a->rn == 15 || a->rt == 15
|| a->rd == a->rn || a->rd == a->rt
|| (s->thumb && (a->rd == 13 || a->rt == 13))
|| (!v8a && s->thumb && (a->rd == 13 || a->rt == 13))
|| (mop == MO_64
&& (a->rt2 == 15
|| a->rd == a->rt2
|| (s->thumb && a->rt2 == 13)))) {
|| (!v8a && s->thumb && a->rt2 == 13)))) {
unallocated_encoding(s);
return true;
}
@ -9365,13 +9367,15 @@ static bool op_ldrex(DisasContext *s, arg_LDREX *a, MemOp mop, bool acq)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 addr;
/* Some cases stopped being UNPREDICTABLE in v8A (but not v8M) */
bool v8a = ENABLE_ARCH_8 && !arm_dc_feature(s, ARM_FEATURE_M);
/* We UNDEF for these UNPREDICTABLE cases. */
if (a->rn == 15 || a->rt == 15
|| (s->thumb && a->rt == 13)
|| (!v8a && s->thumb && a->rt == 13)
|| (mop == MO_64
&& (a->rt2 == 15 || a->rt == a->rt2
|| (s->thumb && a->rt2 == 13)))) {
|| (!v8a && s->thumb && a->rt2 == 13)))) {
unallocated_encoding(s);
return true;
}