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Merge pull request #216 from lunixbochs/master

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allow setting x86 segment base to host-sized value
This commit is contained in:
Nguyen Anh Quynh 2015-10-24 23:09:07 +08:00
parent 92f7e2e156 8c60d0dca5
commit e084c88092
1 changed files with 24 additions and 24 deletions
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48
qemu/target-i386/unicorn.c
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@ -260,22 +260,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
*(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip);
break; break;
case UC_X86_REG_CS: case UC_X86_REG_CS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base;
break; break;
case UC_X86_REG_DS: case UC_X86_REG_DS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base;
break; break;
case UC_X86_REG_SS: case UC_X86_REG_SS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base;
break; break;
case UC_X86_REG_ES: case UC_X86_REG_ES:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base;
break; break;
case UC_X86_REG_FS: case UC_X86_REG_FS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base;
break; break;
case UC_X86_REG_GS: case UC_X86_REG_GS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base; *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base;
break; break;
} }
break; break;
@ -412,22 +412,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
*(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip);
break; break;
case UC_X86_REG_CS: case UC_X86_REG_CS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base;
break; break;
case UC_X86_REG_DS: case UC_X86_REG_DS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base;
break; break;
case UC_X86_REG_SS: case UC_X86_REG_SS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base;
break; break;
case UC_X86_REG_ES: case UC_X86_REG_ES:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base;
break; break;
case UC_X86_REG_FS: case UC_X86_REG_FS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base;
break; break;
case UC_X86_REG_GS: case UC_X86_REG_GS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base; *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base;
break; break;
case UC_X86_REG_R8: case UC_X86_REG_R8:
*(int64_t *)value = READ_QWORD(X86_CPU(uc, mycpu)->env.regs[8]); *(int64_t *)value = READ_QWORD(X86_CPU(uc, mycpu)->env.regs[8]);
@ -660,22 +660,22 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value); WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value);
break; break;
case UC_X86_REG_CS: case UC_X86_REG_CS:
X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint32_t *)value;
break; break;
case UC_X86_REG_DS: case UC_X86_REG_DS:
X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint32_t *)value;
break; break;
case UC_X86_REG_SS: case UC_X86_REG_SS:
X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint32_t *)value;
break; break;
case UC_X86_REG_ES: case UC_X86_REG_ES:
X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint32_t *)value;
break; break;
case UC_X86_REG_FS: case UC_X86_REG_FS:
X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint32_t *)value;
break; break;
case UC_X86_REG_GS: case UC_X86_REG_GS:
X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint32_t *)value;
break; break;
} }
break; break;
@ -812,22 +812,22 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value); WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value);
break; break;
case UC_X86_REG_CS: case UC_X86_REG_CS:
X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_DS: case UC_X86_REG_DS:
X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_SS: case UC_X86_REG_SS:
X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_ES: case UC_X86_REG_ES:
X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_FS: case UC_X86_REG_FS:
X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_GS: case UC_X86_REG_GS:
X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint16_t *)value; X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint64_t *)value;
break; break;
case UC_X86_REG_R8: case UC_X86_REG_R8:
X86_CPU(uc, mycpu)->env.regs[8] = *(uint64_t *)value; X86_CPU(uc, mycpu)->env.regs[8] = *(uint64_t *)value;