mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2025-01-22 09:01:10 +00:00
tcg: Add gvec expanders for nand, nor, eqv
Backports commit f550805d8309500d642f640af8d9928958465478 from qemu
This commit is contained in:
parent
11664d444e
commit
e08d0feee4
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@ -1131,6 +1131,7 @@
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||||||
#define helper_gvec_eq16 helper_gvec_eq16_aarch64
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#define helper_gvec_eq16 helper_gvec_eq16_aarch64
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||||||
#define helper_gvec_eq32 helper_gvec_eq32_aarch64
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#define helper_gvec_eq32 helper_gvec_eq32_aarch64
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||||||
#define helper_gvec_eq64 helper_gvec_eq64_aarch64
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#define helper_gvec_eq64 helper_gvec_eq64_aarch64
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||||||
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#define helper_gvec_eqv helper_gvec_eqv_aarch64
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||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_aarch64
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#define helper_gvec_fadd_d helper_gvec_fadd_d_aarch64
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||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_aarch64
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#define helper_gvec_fadd_h helper_gvec_fadd_h_aarch64
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#define helper_gvec_fadd_s helper_gvec_fadd_s_aarch64
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#define helper_gvec_fadd_s helper_gvec_fadd_s_aarch64
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@ -1188,6 +1189,7 @@
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#define helper_gvec_muls16 helper_gvec_muls16_aarch64
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#define helper_gvec_muls16 helper_gvec_muls16_aarch64
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||||||
#define helper_gvec_muls32 helper_gvec_muls32_aarch64
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#define helper_gvec_muls32 helper_gvec_muls32_aarch64
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||||||
#define helper_gvec_muls64 helper_gvec_muls64_aarch64
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#define helper_gvec_muls64 helper_gvec_muls64_aarch64
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||||||
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#define helper_gvec_nand helper_gvec_nand_aarch64
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64
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||||||
#define helper_gvec_ne16 helper_gvec_ne16_aarch64
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#define helper_gvec_ne16 helper_gvec_ne16_aarch64
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||||||
#define helper_gvec_ne32 helper_gvec_ne32_aarch64
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#define helper_gvec_ne32 helper_gvec_ne32_aarch64
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||||||
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@ -1196,6 +1198,7 @@
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||||||
#define helper_gvec_neg16 helper_gvec_neg16_aarch64
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#define helper_gvec_neg16 helper_gvec_neg16_aarch64
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||||||
#define helper_gvec_neg32 helper_gvec_neg32_aarch64
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#define helper_gvec_neg32 helper_gvec_neg32_aarch64
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||||||
#define helper_gvec_neg64 helper_gvec_neg64_aarch64
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#define helper_gvec_neg64 helper_gvec_neg64_aarch64
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||||||
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#define helper_gvec_nor helper_gvec_nor_aarch64
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||||||
#define helper_gvec_not helper_gvec_not_aarch64
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#define helper_gvec_not helper_gvec_not_aarch64
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||||||
#define helper_gvec_or helper_gvec_or_aarch64
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#define helper_gvec_or helper_gvec_or_aarch64
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||||||
#define helper_gvec_orc helper_gvec_orc_aarch64
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#define helper_gvec_orc helper_gvec_orc_aarch64
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@ -2769,6 +2772,7 @@
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#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_aarch64
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#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_aarch64
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||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_aarch64
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#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_aarch64
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||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_aarch64
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#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_aarch64
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||||||
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#define tcg_gen_eqv_vec tcg_gen_eqv_vec_aarch64
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#define tcg_gen_exit_tb tcg_gen_exit_tb_aarch64
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#define tcg_gen_exit_tb tcg_gen_exit_tb_aarch64
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||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_aarch64
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#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_aarch64
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#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_aarch64
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#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_aarch64
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@ -2821,6 +2825,7 @@
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#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_aarch64
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#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_aarch64
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#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64
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#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64
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#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64
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#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64
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||||||
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#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_aarch64
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#define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64
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#define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64
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#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64
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#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64
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#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64
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#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64
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@ -2829,7 +2834,9 @@
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#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64
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#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64
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||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64
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#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64
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#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64
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#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64
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||||||
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#define tcg_gen_gvec_nand tcg_gen_gvec_nand_aarch64
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#define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64
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#define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64
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||||||
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#define tcg_gen_gvec_nor tcg_gen_gvec_nor_aarch64
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||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64
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#define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64
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#define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64
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#define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64
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#define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64
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#define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64
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@ -2885,6 +2892,7 @@
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#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_aarch64
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#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_aarch64
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#define tcg_gen_nand_i32 tcg_gen_nand_i32_aarch64
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#define tcg_gen_nand_i32 tcg_gen_nand_i32_aarch64
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#define tcg_gen_nand_i64 tcg_gen_nand_i64_aarch64
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#define tcg_gen_nand_i64 tcg_gen_nand_i64_aarch64
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#define tcg_gen_nand_vec tcg_gen_nand_vec_aarch64
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#define tcg_gen_neg_i32 tcg_gen_neg_i32_aarch64
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#define tcg_gen_neg_i32 tcg_gen_neg_i32_aarch64
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#define tcg_gen_neg_i64 tcg_gen_neg_i64_aarch64
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#define tcg_gen_neg_i64 tcg_gen_neg_i64_aarch64
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#define tcg_gen_neg_vec tcg_gen_neg_vec_aarch64
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#define tcg_gen_neg_vec tcg_gen_neg_vec_aarch64
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@ -1131,6 +1131,7 @@
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#define helper_gvec_eq16 helper_gvec_eq16_aarch64eb
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#define helper_gvec_eq16 helper_gvec_eq16_aarch64eb
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#define helper_gvec_eq32 helper_gvec_eq32_aarch64eb
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#define helper_gvec_eq32 helper_gvec_eq32_aarch64eb
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#define helper_gvec_eq64 helper_gvec_eq64_aarch64eb
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#define helper_gvec_eq64 helper_gvec_eq64_aarch64eb
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#define helper_gvec_eqv helper_gvec_eqv_aarch64eb
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#define helper_gvec_fadd_d helper_gvec_fadd_d_aarch64eb
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#define helper_gvec_fadd_d helper_gvec_fadd_d_aarch64eb
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#define helper_gvec_fadd_h helper_gvec_fadd_h_aarch64eb
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#define helper_gvec_fadd_h helper_gvec_fadd_h_aarch64eb
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#define helper_gvec_fadd_s helper_gvec_fadd_s_aarch64eb
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#define helper_gvec_fadd_s helper_gvec_fadd_s_aarch64eb
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@ -1188,6 +1189,7 @@
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#define helper_gvec_muls16 helper_gvec_muls16_aarch64eb
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#define helper_gvec_muls16 helper_gvec_muls16_aarch64eb
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#define helper_gvec_muls32 helper_gvec_muls32_aarch64eb
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#define helper_gvec_muls32 helper_gvec_muls32_aarch64eb
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#define helper_gvec_muls64 helper_gvec_muls64_aarch64eb
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#define helper_gvec_muls64 helper_gvec_muls64_aarch64eb
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||||||
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#define helper_gvec_nand helper_gvec_nand_aarch64eb
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64eb
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64eb
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#define helper_gvec_ne16 helper_gvec_ne16_aarch64eb
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#define helper_gvec_ne16 helper_gvec_ne16_aarch64eb
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#define helper_gvec_ne32 helper_gvec_ne32_aarch64eb
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#define helper_gvec_ne32 helper_gvec_ne32_aarch64eb
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@ -1196,6 +1198,7 @@
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#define helper_gvec_neg16 helper_gvec_neg16_aarch64eb
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#define helper_gvec_neg16 helper_gvec_neg16_aarch64eb
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#define helper_gvec_neg32 helper_gvec_neg32_aarch64eb
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#define helper_gvec_neg32 helper_gvec_neg32_aarch64eb
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||||||
#define helper_gvec_neg64 helper_gvec_neg64_aarch64eb
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#define helper_gvec_neg64 helper_gvec_neg64_aarch64eb
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||||||
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#define helper_gvec_nor helper_gvec_nor_aarch64eb
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#define helper_gvec_not helper_gvec_not_aarch64eb
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#define helper_gvec_not helper_gvec_not_aarch64eb
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||||||
#define helper_gvec_or helper_gvec_or_aarch64eb
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#define helper_gvec_or helper_gvec_or_aarch64eb
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#define helper_gvec_orc helper_gvec_orc_aarch64eb
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#define helper_gvec_orc helper_gvec_orc_aarch64eb
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@ -2769,6 +2772,7 @@
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#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_aarch64eb
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#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_aarch64eb
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#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_aarch64eb
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#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_aarch64eb
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#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_aarch64eb
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#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_aarch64eb
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#define tcg_gen_eqv_vec tcg_gen_eqv_vec_aarch64eb
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#define tcg_gen_exit_tb tcg_gen_exit_tb_aarch64eb
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#define tcg_gen_exit_tb tcg_gen_exit_tb_aarch64eb
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#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_aarch64eb
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#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_aarch64eb
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#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_aarch64eb
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#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_aarch64eb
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@ -2821,6 +2825,7 @@
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#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_aarch64eb
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#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_aarch64eb
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#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64eb
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#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64eb
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#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64eb
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#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64eb
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#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_aarch64eb
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#define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64eb
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#define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64eb
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#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64eb
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#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64eb
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#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64eb
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#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64eb
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@ -2829,7 +2834,9 @@
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#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64eb
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#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64eb
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#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64eb
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#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64eb
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#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64eb
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#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64eb
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#define tcg_gen_gvec_nand tcg_gen_gvec_nand_aarch64eb
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#define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64eb
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#define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64eb
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#define tcg_gen_gvec_nor tcg_gen_gvec_nor_aarch64eb
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#define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64eb
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#define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64eb
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#define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64eb
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#define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64eb
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#define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64eb
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#define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64eb
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@ -2885,6 +2892,7 @@
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#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_aarch64eb
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#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_aarch64eb
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#define tcg_gen_nand_i32 tcg_gen_nand_i32_aarch64eb
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#define tcg_gen_nand_i32 tcg_gen_nand_i32_aarch64eb
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#define tcg_gen_nand_i64 tcg_gen_nand_i64_aarch64eb
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#define tcg_gen_nand_i64 tcg_gen_nand_i64_aarch64eb
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#define tcg_gen_nand_vec tcg_gen_nand_vec_aarch64eb
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#define tcg_gen_neg_i32 tcg_gen_neg_i32_aarch64eb
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#define tcg_gen_neg_i32 tcg_gen_neg_i32_aarch64eb
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#define tcg_gen_neg_i64 tcg_gen_neg_i64_aarch64eb
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#define tcg_gen_neg_i64 tcg_gen_neg_i64_aarch64eb
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#define tcg_gen_neg_vec tcg_gen_neg_vec_aarch64eb
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#define tcg_gen_neg_vec tcg_gen_neg_vec_aarch64eb
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@ -512,6 +512,39 @@ void HELPER(gvec_orc)(void *d, void *a, void *b, uint32_t desc)
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clear_high(d, oprsz, desc);
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clear_high(d, oprsz, desc);
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}
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}
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void HELPER(gvec_nand)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(vec64)) {
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*(vec64 *)(d + i) = ~(*(vec64 *)(a + i) & *(vec64 *)(b + i));
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_nor)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(vec64)) {
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*(vec64 *)(d + i) = ~(*(vec64 *)(a + i) | *(vec64 *)(b + i));
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(vec64)) {
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*(vec64 *)(d + i) = ~(*(vec64 *)(a + i) ^ *(vec64 *)(b + i));
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
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void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
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{
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t oprsz = simd_oprsz(desc);
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@ -212,6 +212,9 @@ DEF_HELPER_FLAGS_4(gvec_or, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_xor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_xor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_andc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_andc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_orc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_orc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_nand, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_nor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_eqv, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_ands, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
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DEF_HELPER_FLAGS_4(gvec_ands, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
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DEF_HELPER_FLAGS_4(gvec_xors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
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DEF_HELPER_FLAGS_4(gvec_xors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_arm
|
#define helper_gvec_eq16 helper_gvec_eq16_arm
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_arm
|
#define helper_gvec_eq32 helper_gvec_eq32_arm
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_arm
|
#define helper_gvec_eq64 helper_gvec_eq64_arm
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_arm
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_arm
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_arm
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_arm
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_arm
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_arm
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_arm
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_arm
|
#define helper_gvec_muls16 helper_gvec_muls16_arm
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_arm
|
#define helper_gvec_muls32 helper_gvec_muls32_arm
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_arm
|
#define helper_gvec_muls64 helper_gvec_muls64_arm
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_arm
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_arm
|
#define helper_gvec_ne8 helper_gvec_ne8_arm
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_arm
|
#define helper_gvec_ne16 helper_gvec_ne16_arm
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_arm
|
#define helper_gvec_ne32 helper_gvec_ne32_arm
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_arm
|
#define helper_gvec_neg16 helper_gvec_neg16_arm
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_arm
|
#define helper_gvec_neg32 helper_gvec_neg32_arm
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_arm
|
#define helper_gvec_neg64 helper_gvec_neg64_arm
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_arm
|
||||||
#define helper_gvec_not helper_gvec_not_arm
|
#define helper_gvec_not helper_gvec_not_arm
|
||||||
#define helper_gvec_or helper_gvec_or_arm
|
#define helper_gvec_or helper_gvec_or_arm
|
||||||
#define helper_gvec_orc helper_gvec_orc_arm
|
#define helper_gvec_orc helper_gvec_orc_arm
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_arm
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_arm
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_arm
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_arm
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_arm
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_arm
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_arm
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_arm
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_arm
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_arm
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_arm
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_arm
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_arm
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_arm
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_arm
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_arm
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_arm
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_arm
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_arm
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_arm
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_arm
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_arm
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_arm
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_arm
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_arm
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_arm
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_arm
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_arm
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_arm
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_arm
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_arm
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_arm
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_arm
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_arm
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_arm
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_arm
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_arm
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_arm
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_arm
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_arm
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_arm
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_arm
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_arm
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_arm
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_arm
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_arm
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_arm
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_arm
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_arm
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_arm
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_arm
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_arm
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_arm
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_arm
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_arm
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_armeb
|
#define helper_gvec_eq16 helper_gvec_eq16_armeb
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_armeb
|
#define helper_gvec_eq32 helper_gvec_eq32_armeb
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_armeb
|
#define helper_gvec_eq64 helper_gvec_eq64_armeb
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_armeb
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_armeb
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_armeb
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_armeb
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_armeb
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_armeb
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_armeb
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_armeb
|
#define helper_gvec_muls16 helper_gvec_muls16_armeb
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_armeb
|
#define helper_gvec_muls32 helper_gvec_muls32_armeb
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_armeb
|
#define helper_gvec_muls64 helper_gvec_muls64_armeb
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_armeb
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_armeb
|
#define helper_gvec_ne8 helper_gvec_ne8_armeb
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_armeb
|
#define helper_gvec_ne16 helper_gvec_ne16_armeb
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_armeb
|
#define helper_gvec_ne32 helper_gvec_ne32_armeb
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_armeb
|
#define helper_gvec_neg16 helper_gvec_neg16_armeb
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_armeb
|
#define helper_gvec_neg32 helper_gvec_neg32_armeb
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_armeb
|
#define helper_gvec_neg64 helper_gvec_neg64_armeb
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_armeb
|
||||||
#define helper_gvec_not helper_gvec_not_armeb
|
#define helper_gvec_not helper_gvec_not_armeb
|
||||||
#define helper_gvec_or helper_gvec_or_armeb
|
#define helper_gvec_or helper_gvec_or_armeb
|
||||||
#define helper_gvec_orc helper_gvec_orc_armeb
|
#define helper_gvec_orc helper_gvec_orc_armeb
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_armeb
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_armeb
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_armeb
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_armeb
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_armeb
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_armeb
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_armeb
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_armeb
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_armeb
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_armeb
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_armeb
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_armeb
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_armeb
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_armeb
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_armeb
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_armeb
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_armeb
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_armeb
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_armeb
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_armeb
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_armeb
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_armeb
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_armeb
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_armeb
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_armeb
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_armeb
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_armeb
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_armeb
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_armeb
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_armeb
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_armeb
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_armeb
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_armeb
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_armeb
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_armeb
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_armeb
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_armeb
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_armeb
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_armeb
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_armeb
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_armeb
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_armeb
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_armeb
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_armeb
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_armeb
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_armeb
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_armeb
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_armeb
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_armeb
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_armeb
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_armeb
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_armeb
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_armeb
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_armeb
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_armeb
|
||||||
|
|
|
@ -1137,6 +1137,7 @@ symbols = (
|
||||||
'helper_gvec_eq16',
|
'helper_gvec_eq16',
|
||||||
'helper_gvec_eq32',
|
'helper_gvec_eq32',
|
||||||
'helper_gvec_eq64',
|
'helper_gvec_eq64',
|
||||||
|
'helper_gvec_eqv',
|
||||||
'helper_gvec_fadd_d',
|
'helper_gvec_fadd_d',
|
||||||
'helper_gvec_fadd_h',
|
'helper_gvec_fadd_h',
|
||||||
'helper_gvec_fadd_s',
|
'helper_gvec_fadd_s',
|
||||||
|
@ -1194,6 +1195,7 @@ symbols = (
|
||||||
'helper_gvec_muls16',
|
'helper_gvec_muls16',
|
||||||
'helper_gvec_muls32',
|
'helper_gvec_muls32',
|
||||||
'helper_gvec_muls64',
|
'helper_gvec_muls64',
|
||||||
|
'helper_gvec_nand',
|
||||||
'helper_gvec_ne8',
|
'helper_gvec_ne8',
|
||||||
'helper_gvec_ne16',
|
'helper_gvec_ne16',
|
||||||
'helper_gvec_ne32',
|
'helper_gvec_ne32',
|
||||||
|
@ -1202,6 +1204,7 @@ symbols = (
|
||||||
'helper_gvec_neg16',
|
'helper_gvec_neg16',
|
||||||
'helper_gvec_neg32',
|
'helper_gvec_neg32',
|
||||||
'helper_gvec_neg64',
|
'helper_gvec_neg64',
|
||||||
|
'helper_gvec_nor',
|
||||||
'helper_gvec_not',
|
'helper_gvec_not',
|
||||||
'helper_gvec_or',
|
'helper_gvec_or',
|
||||||
'helper_gvec_orc',
|
'helper_gvec_orc',
|
||||||
|
@ -2775,6 +2778,7 @@ symbols = (
|
||||||
'tcg_gen_dup_i64_vec',
|
'tcg_gen_dup_i64_vec',
|
||||||
'tcg_gen_eqv_i32',
|
'tcg_gen_eqv_i32',
|
||||||
'tcg_gen_eqv_i64',
|
'tcg_gen_eqv_i64',
|
||||||
|
'tcg_gen_eqv_vec',
|
||||||
'tcg_gen_exit_tb',
|
'tcg_gen_exit_tb',
|
||||||
'tcg_gen_ext16s_i32',
|
'tcg_gen_ext16s_i32',
|
||||||
'tcg_gen_ext16s_i64',
|
'tcg_gen_ext16s_i64',
|
||||||
|
@ -2827,6 +2831,7 @@ symbols = (
|
||||||
'tcg_gen_gvec_dup_i32',
|
'tcg_gen_gvec_dup_i32',
|
||||||
'tcg_gen_gvec_dup_i64',
|
'tcg_gen_gvec_dup_i64',
|
||||||
'tcg_gen_gvec_dup_mem',
|
'tcg_gen_gvec_dup_mem',
|
||||||
|
'tcg_gen_gvec_eqv',
|
||||||
'tcg_gen_gvec_mov',
|
'tcg_gen_gvec_mov',
|
||||||
'tcg_gen_gvec_mul',
|
'tcg_gen_gvec_mul',
|
||||||
'tcg_gen_gvec_muli',
|
'tcg_gen_gvec_muli',
|
||||||
|
@ -2835,7 +2840,9 @@ symbols = (
|
||||||
'tcg_gen_gvec_muls16',
|
'tcg_gen_gvec_muls16',
|
||||||
'tcg_gen_gvec_muls32',
|
'tcg_gen_gvec_muls32',
|
||||||
'tcg_gen_gvec_muls64',
|
'tcg_gen_gvec_muls64',
|
||||||
|
'tcg_gen_gvec_nand',
|
||||||
'tcg_gen_gvec_neg',
|
'tcg_gen_gvec_neg',
|
||||||
|
'tcg_gen_gvec_nor',
|
||||||
'tcg_gen_gvec_not',
|
'tcg_gen_gvec_not',
|
||||||
'tcg_gen_gvec_or',
|
'tcg_gen_gvec_or',
|
||||||
'tcg_gen_gvec_orc',
|
'tcg_gen_gvec_orc',
|
||||||
|
@ -2891,6 +2898,7 @@ symbols = (
|
||||||
'tcg_gen_mulu2_i64',
|
'tcg_gen_mulu2_i64',
|
||||||
'tcg_gen_nand_i32',
|
'tcg_gen_nand_i32',
|
||||||
'tcg_gen_nand_i64',
|
'tcg_gen_nand_i64',
|
||||||
|
'tcg_gen_nand_vec',
|
||||||
'tcg_gen_neg_i32',
|
'tcg_gen_neg_i32',
|
||||||
'tcg_gen_neg_i64',
|
'tcg_gen_neg_i64',
|
||||||
'tcg_gen_neg_vec',
|
'tcg_gen_neg_vec',
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_m68k
|
#define helper_gvec_eq16 helper_gvec_eq16_m68k
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_m68k
|
#define helper_gvec_eq32 helper_gvec_eq32_m68k
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_m68k
|
#define helper_gvec_eq64 helper_gvec_eq64_m68k
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_m68k
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_m68k
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_m68k
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_m68k
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_m68k
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_m68k
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_m68k
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_m68k
|
#define helper_gvec_muls16 helper_gvec_muls16_m68k
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_m68k
|
#define helper_gvec_muls32 helper_gvec_muls32_m68k
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_m68k
|
#define helper_gvec_muls64 helper_gvec_muls64_m68k
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_m68k
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_m68k
|
#define helper_gvec_ne8 helper_gvec_ne8_m68k
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_m68k
|
#define helper_gvec_ne16 helper_gvec_ne16_m68k
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_m68k
|
#define helper_gvec_ne32 helper_gvec_ne32_m68k
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_m68k
|
#define helper_gvec_neg16 helper_gvec_neg16_m68k
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_m68k
|
#define helper_gvec_neg32 helper_gvec_neg32_m68k
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_m68k
|
#define helper_gvec_neg64 helper_gvec_neg64_m68k
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_m68k
|
||||||
#define helper_gvec_not helper_gvec_not_m68k
|
#define helper_gvec_not helper_gvec_not_m68k
|
||||||
#define helper_gvec_or helper_gvec_or_m68k
|
#define helper_gvec_or helper_gvec_or_m68k
|
||||||
#define helper_gvec_orc helper_gvec_orc_m68k
|
#define helper_gvec_orc helper_gvec_orc_m68k
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_m68k
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_m68k
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_m68k
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_m68k
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_m68k
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_m68k
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_m68k
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_m68k
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_m68k
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_m68k
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_m68k
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_m68k
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_m68k
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_m68k
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_m68k
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_m68k
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_m68k
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_m68k
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_m68k
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_m68k
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_m68k
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_m68k
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_m68k
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_m68k
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_m68k
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_m68k
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_m68k
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_m68k
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_m68k
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_m68k
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_m68k
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_m68k
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_m68k
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_m68k
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_m68k
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_m68k
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_m68k
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_m68k
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_m68k
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_m68k
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_m68k
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_m68k
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_m68k
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_m68k
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_m68k
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_m68k
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_m68k
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_m68k
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_m68k
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_m68k
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_m68k
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_m68k
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_m68k
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_m68k
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_m68k
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_mips
|
#define helper_gvec_eq16 helper_gvec_eq16_mips
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_mips
|
#define helper_gvec_eq32 helper_gvec_eq32_mips
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_mips
|
#define helper_gvec_eq64 helper_gvec_eq64_mips
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_mips
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_mips
|
#define helper_gvec_muls16 helper_gvec_muls16_mips
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_mips
|
#define helper_gvec_muls32 helper_gvec_muls32_mips
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_mips
|
#define helper_gvec_muls64 helper_gvec_muls64_mips
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_mips
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_mips
|
#define helper_gvec_ne8 helper_gvec_ne8_mips
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_mips
|
#define helper_gvec_ne16 helper_gvec_ne16_mips
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_mips
|
#define helper_gvec_ne32 helper_gvec_ne32_mips
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_mips
|
#define helper_gvec_neg16 helper_gvec_neg16_mips
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_mips
|
#define helper_gvec_neg32 helper_gvec_neg32_mips
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_mips
|
#define helper_gvec_neg64 helper_gvec_neg64_mips
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_mips
|
||||||
#define helper_gvec_not helper_gvec_not_mips
|
#define helper_gvec_not helper_gvec_not_mips
|
||||||
#define helper_gvec_or helper_gvec_or_mips
|
#define helper_gvec_or helper_gvec_or_mips
|
||||||
#define helper_gvec_orc helper_gvec_orc_mips
|
#define helper_gvec_orc helper_gvec_orc_mips
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_mips
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_mips
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_mips
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_mips
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_mips
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_mips64
|
#define helper_gvec_eq16 helper_gvec_eq16_mips64
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_mips64
|
#define helper_gvec_eq32 helper_gvec_eq32_mips64
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_mips64
|
#define helper_gvec_eq64 helper_gvec_eq64_mips64
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_mips64
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips64
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips64
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips64
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips64
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips64
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips64
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_mips64
|
#define helper_gvec_muls16 helper_gvec_muls16_mips64
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_mips64
|
#define helper_gvec_muls32 helper_gvec_muls32_mips64
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_mips64
|
#define helper_gvec_muls64 helper_gvec_muls64_mips64
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_mips64
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_mips64
|
#define helper_gvec_ne8 helper_gvec_ne8_mips64
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_mips64
|
#define helper_gvec_ne16 helper_gvec_ne16_mips64
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_mips64
|
#define helper_gvec_ne32 helper_gvec_ne32_mips64
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_mips64
|
#define helper_gvec_neg16 helper_gvec_neg16_mips64
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_mips64
|
#define helper_gvec_neg32 helper_gvec_neg32_mips64
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_mips64
|
#define helper_gvec_neg64 helper_gvec_neg64_mips64
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_mips64
|
||||||
#define helper_gvec_not helper_gvec_not_mips64
|
#define helper_gvec_not helper_gvec_not_mips64
|
||||||
#define helper_gvec_or helper_gvec_or_mips64
|
#define helper_gvec_or helper_gvec_or_mips64
|
||||||
#define helper_gvec_orc helper_gvec_orc_mips64
|
#define helper_gvec_orc helper_gvec_orc_mips64
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips64
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips64
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips64
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips64
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips64
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips64
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_mips64
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips64
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips64
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips64
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips64
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips64
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips64
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips64
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips64
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_mips64
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_mips64
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_mips64
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips64
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips64
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips64
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips64
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips64
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips64
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips64
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips64
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips64
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips64
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_mips64
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips64
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips64
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips64
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips64
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips64
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips64
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_mips64el
|
#define helper_gvec_eq16 helper_gvec_eq16_mips64el
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_mips64el
|
#define helper_gvec_eq32 helper_gvec_eq32_mips64el
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_mips64el
|
#define helper_gvec_eq64 helper_gvec_eq64_mips64el
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_mips64el
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips64el
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_mips64el
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips64el
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_mips64el
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips64el
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_mips64el
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_mips64el
|
#define helper_gvec_muls16 helper_gvec_muls16_mips64el
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_mips64el
|
#define helper_gvec_muls32 helper_gvec_muls32_mips64el
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_mips64el
|
#define helper_gvec_muls64 helper_gvec_muls64_mips64el
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_mips64el
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_mips64el
|
#define helper_gvec_ne8 helper_gvec_ne8_mips64el
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_mips64el
|
#define helper_gvec_ne16 helper_gvec_ne16_mips64el
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_mips64el
|
#define helper_gvec_ne32 helper_gvec_ne32_mips64el
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_mips64el
|
#define helper_gvec_neg16 helper_gvec_neg16_mips64el
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_mips64el
|
#define helper_gvec_neg32 helper_gvec_neg32_mips64el
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_mips64el
|
#define helper_gvec_neg64 helper_gvec_neg64_mips64el
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_mips64el
|
||||||
#define helper_gvec_not helper_gvec_not_mips64el
|
#define helper_gvec_not helper_gvec_not_mips64el
|
||||||
#define helper_gvec_or helper_gvec_or_mips64el
|
#define helper_gvec_or helper_gvec_or_mips64el
|
||||||
#define helper_gvec_orc helper_gvec_orc_mips64el
|
#define helper_gvec_orc helper_gvec_orc_mips64el
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips64el
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips64el
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips64el
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips64el
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips64el
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips64el
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_mips64el
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips64el
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips64el
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips64el
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips64el
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips64el
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips64el
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips64el
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips64el
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64el
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64el
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64el
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64el
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_mips64el
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64el
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64el
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64el
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64el
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64el
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64el
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64el
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64el
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64el
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64el
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64el
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64el
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_mips64el
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64el
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64el
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_mips64el
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips64el
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips64el
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips64el
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips64el
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64el
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64el
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips64el
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips64el
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips64el
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips64el
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips64el
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips64el
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_mips64el
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips64el
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mips64el
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips64el
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mips64el
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips64el
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips64el
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_mipsel
|
#define helper_gvec_eq16 helper_gvec_eq16_mipsel
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_mipsel
|
#define helper_gvec_eq32 helper_gvec_eq32_mipsel
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_mipsel
|
#define helper_gvec_eq64 helper_gvec_eq64_mipsel
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_mipsel
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_mipsel
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_mipsel
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_mipsel
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_mipsel
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_mipsel
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_mipsel
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_mipsel
|
#define helper_gvec_muls16 helper_gvec_muls16_mipsel
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_mipsel
|
#define helper_gvec_muls32 helper_gvec_muls32_mipsel
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_mipsel
|
#define helper_gvec_muls64 helper_gvec_muls64_mipsel
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_mipsel
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_mipsel
|
#define helper_gvec_ne8 helper_gvec_ne8_mipsel
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_mipsel
|
#define helper_gvec_ne16 helper_gvec_ne16_mipsel
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_mipsel
|
#define helper_gvec_ne32 helper_gvec_ne32_mipsel
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_mipsel
|
#define helper_gvec_neg16 helper_gvec_neg16_mipsel
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_mipsel
|
#define helper_gvec_neg32 helper_gvec_neg32_mipsel
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_mipsel
|
#define helper_gvec_neg64 helper_gvec_neg64_mipsel
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_mipsel
|
||||||
#define helper_gvec_not helper_gvec_not_mipsel
|
#define helper_gvec_not helper_gvec_not_mipsel
|
||||||
#define helper_gvec_or helper_gvec_or_mipsel
|
#define helper_gvec_or helper_gvec_or_mipsel
|
||||||
#define helper_gvec_orc helper_gvec_orc_mipsel
|
#define helper_gvec_orc helper_gvec_orc_mipsel
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mipsel
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mipsel
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mipsel
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mipsel
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mipsel
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mipsel
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_mipsel
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_mipsel
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_mipsel
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mipsel
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mipsel
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mipsel
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mipsel
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mipsel
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mipsel
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mipsel
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mipsel
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mipsel
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mipsel
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_mipsel
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mipsel
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mipsel
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mipsel
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mipsel
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mipsel
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mipsel
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mipsel
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mipsel
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mipsel
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mipsel
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mipsel
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mipsel
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_mipsel
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mipsel
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mipsel
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_mipsel
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_mipsel
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_mipsel
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_mipsel
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_mipsel
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mipsel
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mipsel
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mipsel
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mipsel
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mipsel
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mipsel
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mipsel
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mipsel
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_mipsel
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mipsel
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_mipsel
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mipsel
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_mipsel
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_mipsel
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_mipsel
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_powerpc
|
#define helper_gvec_eq16 helper_gvec_eq16_powerpc
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_powerpc
|
#define helper_gvec_eq32 helper_gvec_eq32_powerpc
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_powerpc
|
#define helper_gvec_eq64 helper_gvec_eq64_powerpc
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_powerpc
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_powerpc
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_powerpc
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_powerpc
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_powerpc
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_powerpc
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_powerpc
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_powerpc
|
#define helper_gvec_muls16 helper_gvec_muls16_powerpc
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_powerpc
|
#define helper_gvec_muls32 helper_gvec_muls32_powerpc
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_powerpc
|
#define helper_gvec_muls64 helper_gvec_muls64_powerpc
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_powerpc
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_powerpc
|
#define helper_gvec_ne8 helper_gvec_ne8_powerpc
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_powerpc
|
#define helper_gvec_ne16 helper_gvec_ne16_powerpc
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_powerpc
|
#define helper_gvec_ne32 helper_gvec_ne32_powerpc
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_powerpc
|
#define helper_gvec_neg16 helper_gvec_neg16_powerpc
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_powerpc
|
#define helper_gvec_neg32 helper_gvec_neg32_powerpc
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_powerpc
|
#define helper_gvec_neg64 helper_gvec_neg64_powerpc
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_powerpc
|
||||||
#define helper_gvec_not helper_gvec_not_powerpc
|
#define helper_gvec_not helper_gvec_not_powerpc
|
||||||
#define helper_gvec_or helper_gvec_or_powerpc
|
#define helper_gvec_or helper_gvec_or_powerpc
|
||||||
#define helper_gvec_orc helper_gvec_orc_powerpc
|
#define helper_gvec_orc helper_gvec_orc_powerpc
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_powerpc
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_powerpc
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_powerpc
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_powerpc
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_powerpc
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_powerpc
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_powerpc
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_powerpc
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_powerpc
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_powerpc
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_powerpc
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_powerpc
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_powerpc
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_powerpc
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_powerpc
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_powerpc
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_powerpc
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_powerpc
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_powerpc
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_powerpc
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_powerpc
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_powerpc
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_powerpc
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_powerpc
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_powerpc
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_powerpc
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_powerpc
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_powerpc
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_powerpc
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_powerpc
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_powerpc
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_powerpc
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_powerpc
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_powerpc
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_powerpc
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_powerpc
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_powerpc
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_powerpc
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_powerpc
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_powerpc
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_powerpc
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_powerpc
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_powerpc
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_powerpc
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_powerpc
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_powerpc
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_powerpc
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_powerpc
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_powerpc
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_powerpc
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_powerpc
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_powerpc
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_powerpc
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_powerpc
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_powerpc
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_sparc
|
#define helper_gvec_eq16 helper_gvec_eq16_sparc
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_sparc
|
#define helper_gvec_eq32 helper_gvec_eq32_sparc
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_sparc
|
#define helper_gvec_eq64 helper_gvec_eq64_sparc
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_sparc
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_sparc
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_sparc
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_sparc
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_sparc
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_sparc
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_sparc
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_sparc
|
#define helper_gvec_muls16 helper_gvec_muls16_sparc
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_sparc
|
#define helper_gvec_muls32 helper_gvec_muls32_sparc
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_sparc
|
#define helper_gvec_muls64 helper_gvec_muls64_sparc
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_sparc
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_sparc
|
#define helper_gvec_ne8 helper_gvec_ne8_sparc
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_sparc
|
#define helper_gvec_ne16 helper_gvec_ne16_sparc
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_sparc
|
#define helper_gvec_ne32 helper_gvec_ne32_sparc
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_sparc
|
#define helper_gvec_neg16 helper_gvec_neg16_sparc
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_sparc
|
#define helper_gvec_neg32 helper_gvec_neg32_sparc
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_sparc
|
#define helper_gvec_neg64 helper_gvec_neg64_sparc
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_sparc
|
||||||
#define helper_gvec_not helper_gvec_not_sparc
|
#define helper_gvec_not helper_gvec_not_sparc
|
||||||
#define helper_gvec_or helper_gvec_or_sparc
|
#define helper_gvec_or helper_gvec_or_sparc
|
||||||
#define helper_gvec_orc helper_gvec_orc_sparc
|
#define helper_gvec_orc helper_gvec_orc_sparc
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_sparc
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_sparc
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_sparc
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_sparc
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_sparc
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_sparc
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_sparc
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_sparc
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_sparc
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_sparc
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_sparc
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_sparc
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_sparc
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_sparc
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_sparc
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_sparc
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_sparc
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_sparc
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_sparc
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_sparc
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_sparc
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_sparc
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_sparc
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_sparc
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_sparc
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_sparc
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_sparc
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_sparc
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_sparc
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_sparc
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_sparc
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_sparc
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_sparc
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_sparc
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_sparc
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_sparc64
|
#define helper_gvec_eq16 helper_gvec_eq16_sparc64
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_sparc64
|
#define helper_gvec_eq32 helper_gvec_eq32_sparc64
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_sparc64
|
#define helper_gvec_eq64 helper_gvec_eq64_sparc64
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_sparc64
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_sparc64
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_sparc64
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_sparc64
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_sparc64
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_sparc64
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_sparc64
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_sparc64
|
#define helper_gvec_muls16 helper_gvec_muls16_sparc64
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_sparc64
|
#define helper_gvec_muls32 helper_gvec_muls32_sparc64
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_sparc64
|
#define helper_gvec_muls64 helper_gvec_muls64_sparc64
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_sparc64
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_sparc64
|
#define helper_gvec_ne8 helper_gvec_ne8_sparc64
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_sparc64
|
#define helper_gvec_ne16 helper_gvec_ne16_sparc64
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_sparc64
|
#define helper_gvec_ne32 helper_gvec_ne32_sparc64
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_sparc64
|
#define helper_gvec_neg16 helper_gvec_neg16_sparc64
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_sparc64
|
#define helper_gvec_neg32 helper_gvec_neg32_sparc64
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_sparc64
|
#define helper_gvec_neg64 helper_gvec_neg64_sparc64
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_sparc64
|
||||||
#define helper_gvec_not helper_gvec_not_sparc64
|
#define helper_gvec_not helper_gvec_not_sparc64
|
||||||
#define helper_gvec_or helper_gvec_or_sparc64
|
#define helper_gvec_or helper_gvec_or_sparc64
|
||||||
#define helper_gvec_orc helper_gvec_orc_sparc64
|
#define helper_gvec_orc helper_gvec_orc_sparc64
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_sparc64
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_sparc64
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_sparc64
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_sparc64
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_sparc64
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_sparc64
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_sparc64
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_sparc64
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_sparc64
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_sparc64
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_sparc64
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_sparc64
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_sparc64
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_sparc64
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_sparc64
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc64
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc64
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc64
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc64
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_sparc64
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc64
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc64
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc64
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc64
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc64
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc64
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc64
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc64
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc64
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc64
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc64
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc64
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_sparc64
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc64
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc64
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_sparc64
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_sparc64
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_sparc64
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_sparc64
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_sparc64
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc64
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc64
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_sparc64
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_sparc64
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_sparc64
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_sparc64
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_sparc64
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_sparc64
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_sparc64
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_sparc64
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_sparc64
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_sparc64
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_sparc64
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_sparc64
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_sparc64
|
||||||
|
|
|
@ -1921,6 +1921,57 @@ void tcg_gen_gvec_orc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void tcg_gen_gvec_nand(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
|
||||||
|
{
|
||||||
|
static const GVecGen3 g = {
|
||||||
|
.fni8 = tcg_gen_nand_i64,
|
||||||
|
.fniv = tcg_gen_nand_vec,
|
||||||
|
.fno = gen_helper_gvec_nand,
|
||||||
|
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
|
||||||
|
};
|
||||||
|
|
||||||
|
if (aofs == bofs) {
|
||||||
|
tcg_gen_gvec_not(s, vece, dofs, aofs, oprsz, maxsz);
|
||||||
|
} else {
|
||||||
|
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void tcg_gen_gvec_nor(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
|
||||||
|
{
|
||||||
|
static const GVecGen3 g = {
|
||||||
|
.fni8 = tcg_gen_nor_i64,
|
||||||
|
.fniv = tcg_gen_nor_vec,
|
||||||
|
.fno = gen_helper_gvec_nor,
|
||||||
|
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
|
||||||
|
};
|
||||||
|
|
||||||
|
if (aofs == bofs) {
|
||||||
|
tcg_gen_gvec_not(s, vece, dofs, aofs, oprsz, maxsz);
|
||||||
|
} else {
|
||||||
|
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void tcg_gen_gvec_eqv(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
|
||||||
|
{
|
||||||
|
static const GVecGen3 g = {
|
||||||
|
.fni8 = tcg_gen_eqv_i64,
|
||||||
|
.fniv = tcg_gen_eqv_vec,
|
||||||
|
.fno = gen_helper_gvec_eqv,
|
||||||
|
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
|
||||||
|
};
|
||||||
|
|
||||||
|
if (aofs == bofs) {
|
||||||
|
tcg_gen_gvec_dup8i(s, dofs, oprsz, maxsz, -1);
|
||||||
|
} else {
|
||||||
|
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static const GVecGen2s gop_ands = {
|
static const GVecGen2s gop_ands = {
|
||||||
.fni8 = tcg_gen_and_i64,
|
.fni8 = tcg_gen_and_i64,
|
||||||
.fniv = tcg_gen_and_vec,
|
.fniv = tcg_gen_and_vec,
|
||||||
|
|
|
@ -242,6 +242,12 @@ void tcg_gen_gvec_andc(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs
|
||||||
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
||||||
void tcg_gen_gvec_orc(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
|
void tcg_gen_gvec_orc(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
||||||
|
void tcg_gen_gvec_nand(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
||||||
|
void tcg_gen_gvec_nor(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
||||||
|
void tcg_gen_gvec_eqv(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
|
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
|
||||||
|
|
||||||
void tcg_gen_gvec_andi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
void tcg_gen_gvec_andi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||||
int64_t c, uint32_t oprsz, uint32_t maxsz);
|
int64_t c, uint32_t oprsz, uint32_t maxsz);
|
||||||
|
|
|
@ -276,6 +276,27 @@ void tcg_gen_orc_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void tcg_gen_nand_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
|
||||||
|
{
|
||||||
|
/* TODO: Add TCG_TARGET_HAS_nand_vec when adding a backend supports it. */
|
||||||
|
tcg_gen_and_vec(s, 0, r, a, b);
|
||||||
|
tcg_gen_not_vec(s, 0, r, r);
|
||||||
|
}
|
||||||
|
|
||||||
|
void tcg_gen_nor_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
|
||||||
|
{
|
||||||
|
/* TODO: Add TCG_TARGET_HAS_nor_vec when adding a backend supports it. */
|
||||||
|
tcg_gen_or_vec(s, 0, r, a, b);
|
||||||
|
tcg_gen_not_vec(s, 0, r, r);
|
||||||
|
}
|
||||||
|
|
||||||
|
void tcg_gen_eqv_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
|
||||||
|
{
|
||||||
|
/* TODO: Add TCG_TARGET_HAS_eqv_vec when adding a backend supports it. */
|
||||||
|
tcg_gen_xor_vec(s, 0, r, a, b);
|
||||||
|
tcg_gen_not_vec(s, 0, r, r);
|
||||||
|
}
|
||||||
|
|
||||||
void tcg_gen_not_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a)
|
void tcg_gen_not_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a)
|
||||||
{
|
{
|
||||||
if (TCG_TARGET_HAS_not_vec) {
|
if (TCG_TARGET_HAS_not_vec) {
|
||||||
|
|
|
@ -970,6 +970,9 @@ void tcg_gen_or_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_ve
|
||||||
void tcg_gen_xor_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
void tcg_gen_xor_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
void tcg_gen_andc_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
void tcg_gen_andc_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
void tcg_gen_orc_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
void tcg_gen_orc_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
|
void tcg_gen_nand_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
|
void tcg_gen_nor_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
|
void tcg_gen_eqv_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
|
||||||
void tcg_gen_not_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a);
|
void tcg_gen_not_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a);
|
||||||
void tcg_gen_neg_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a);
|
void tcg_gen_neg_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a);
|
||||||
|
|
||||||
|
|
|
@ -1131,6 +1131,7 @@
|
||||||
#define helper_gvec_eq16 helper_gvec_eq16_x86_64
|
#define helper_gvec_eq16 helper_gvec_eq16_x86_64
|
||||||
#define helper_gvec_eq32 helper_gvec_eq32_x86_64
|
#define helper_gvec_eq32 helper_gvec_eq32_x86_64
|
||||||
#define helper_gvec_eq64 helper_gvec_eq64_x86_64
|
#define helper_gvec_eq64 helper_gvec_eq64_x86_64
|
||||||
|
#define helper_gvec_eqv helper_gvec_eqv_x86_64
|
||||||
#define helper_gvec_fadd_d helper_gvec_fadd_d_x86_64
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_x86_64
|
||||||
#define helper_gvec_fadd_h helper_gvec_fadd_h_x86_64
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_x86_64
|
||||||
#define helper_gvec_fadd_s helper_gvec_fadd_s_x86_64
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_x86_64
|
||||||
|
@ -1188,6 +1189,7 @@
|
||||||
#define helper_gvec_muls16 helper_gvec_muls16_x86_64
|
#define helper_gvec_muls16 helper_gvec_muls16_x86_64
|
||||||
#define helper_gvec_muls32 helper_gvec_muls32_x86_64
|
#define helper_gvec_muls32 helper_gvec_muls32_x86_64
|
||||||
#define helper_gvec_muls64 helper_gvec_muls64_x86_64
|
#define helper_gvec_muls64 helper_gvec_muls64_x86_64
|
||||||
|
#define helper_gvec_nand helper_gvec_nand_x86_64
|
||||||
#define helper_gvec_ne8 helper_gvec_ne8_x86_64
|
#define helper_gvec_ne8 helper_gvec_ne8_x86_64
|
||||||
#define helper_gvec_ne16 helper_gvec_ne16_x86_64
|
#define helper_gvec_ne16 helper_gvec_ne16_x86_64
|
||||||
#define helper_gvec_ne32 helper_gvec_ne32_x86_64
|
#define helper_gvec_ne32 helper_gvec_ne32_x86_64
|
||||||
|
@ -1196,6 +1198,7 @@
|
||||||
#define helper_gvec_neg16 helper_gvec_neg16_x86_64
|
#define helper_gvec_neg16 helper_gvec_neg16_x86_64
|
||||||
#define helper_gvec_neg32 helper_gvec_neg32_x86_64
|
#define helper_gvec_neg32 helper_gvec_neg32_x86_64
|
||||||
#define helper_gvec_neg64 helper_gvec_neg64_x86_64
|
#define helper_gvec_neg64 helper_gvec_neg64_x86_64
|
||||||
|
#define helper_gvec_nor helper_gvec_nor_x86_64
|
||||||
#define helper_gvec_not helper_gvec_not_x86_64
|
#define helper_gvec_not helper_gvec_not_x86_64
|
||||||
#define helper_gvec_or helper_gvec_or_x86_64
|
#define helper_gvec_or helper_gvec_or_x86_64
|
||||||
#define helper_gvec_orc helper_gvec_orc_x86_64
|
#define helper_gvec_orc helper_gvec_orc_x86_64
|
||||||
|
@ -2769,6 +2772,7 @@
|
||||||
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_x86_64
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_x86_64
|
||||||
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_x86_64
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_x86_64
|
||||||
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_x86_64
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_x86_64
|
||||||
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_x86_64
|
||||||
#define tcg_gen_exit_tb tcg_gen_exit_tb_x86_64
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_x86_64
|
||||||
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_x86_64
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_x86_64
|
||||||
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_x86_64
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_x86_64
|
||||||
|
@ -2821,6 +2825,7 @@
|
||||||
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_x86_64
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_x86_64
|
||||||
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_x86_64
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_x86_64
|
||||||
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_x86_64
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_x86_64
|
||||||
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_x86_64
|
||||||
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_x86_64
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_x86_64
|
||||||
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_x86_64
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_x86_64
|
||||||
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_x86_64
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_x86_64
|
||||||
|
@ -2829,7 +2834,9 @@
|
||||||
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_x86_64
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_x86_64
|
||||||
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_x86_64
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_x86_64
|
||||||
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_x86_64
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_x86_64
|
||||||
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_x86_64
|
||||||
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_x86_64
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_x86_64
|
||||||
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_x86_64
|
||||||
#define tcg_gen_gvec_not tcg_gen_gvec_not_x86_64
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_x86_64
|
||||||
#define tcg_gen_gvec_or tcg_gen_gvec_or_x86_64
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_x86_64
|
||||||
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_x86_64
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_x86_64
|
||||||
|
@ -2885,6 +2892,7 @@
|
||||||
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_x86_64
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_x86_64
|
||||||
#define tcg_gen_nand_i32 tcg_gen_nand_i32_x86_64
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_x86_64
|
||||||
#define tcg_gen_nand_i64 tcg_gen_nand_i64_x86_64
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_x86_64
|
||||||
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_x86_64
|
||||||
#define tcg_gen_neg_i32 tcg_gen_neg_i32_x86_64
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_x86_64
|
||||||
#define tcg_gen_neg_i64 tcg_gen_neg_i64_x86_64
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_x86_64
|
||||||
#define tcg_gen_neg_vec tcg_gen_neg_vec_x86_64
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_x86_64
|
||||||
|
|
Loading…
Reference in a new issue