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target/i386: [tcg] Port to breakpoint_check

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Incrementally paves the way towards using the generic instruction translation
loop.

Backports commit e6b41ec37f0a9742374dfdb90e662745969cd7ea from qemu
This commit is contained in:
Lluís Vilanova 2018-03-04 17:16:52 -05:00 committed by Lioncash
parent 1f0f1fb302
commit e3ea2c0393
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1 changed files with 20 additions and 0 deletions
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20
qemu/target/i386/translate.c
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@ -9233,6 +9233,26 @@ static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
tcg_gen_insn_start(tcg_ctx, dc->base.pc_next, dc->cc_op); tcg_gen_insn_start(tcg_ctx, dc->base.pc_next, dc->cc_op);
} }
static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
const CPUBreakpoint *bp)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
/* If RF is set, suppress an internally generated breakpoint. */
int flags = dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY;
if (bp->flags & flags) {
gen_debug(dc, dc->base.pc_next - dc->cs_base);
dc->base.is_jmp = DISAS_NORETURN;
/* The address covered by the breakpoint must be included in
[tb->pc, tb->pc + tb->size) in order to for it to be
properly cleared -- thus we increment the PC here so that
the logic setting tb->size below does the right thing. */
dc->base.pc_next += 1;
return true;
} else {
return false;
}
}
/* generate intermediate code for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{ {