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target/arm: Move regime_el to internals.h
We will shortly need this in mte_helper.c as well. Backports commit 9c7ab8fc8cb6d6e2fb7a82c1088691c7c23fa1b9 from qemu
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@ -9537,42 +9537,6 @@ void arm_cpu_do_interrupt(CPUState *cs)
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}
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#endif /* !CONFIG_USER_ONLY */
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/* Return the exception level which controls this address translation regime */
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static uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx)
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{
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switch (mmu_idx) {
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case ARMMMUIdx_E20_0:
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case ARMMMUIdx_E20_2:
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case ARMMMUIdx_E20_2_PAN:
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case ARMMMUIdx_Stage2:
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case ARMMMUIdx_E2:
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return 2;
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case ARMMMUIdx_SE3:
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return 3;
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case ARMMMUIdx_SE10_0:
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return arm_el_is_aa64(env, 3) ? 1 : 3;
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case ARMMMUIdx_SE10_1:
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case ARMMMUIdx_SE10_1_PAN:
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case ARMMMUIdx_Stage1_E0:
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case ARMMMUIdx_Stage1_E1:
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case ARMMMUIdx_Stage1_E1_PAN:
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case ARMMMUIdx_E10_0:
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case ARMMMUIdx_E10_1:
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case ARMMMUIdx_E10_1_PAN:
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case ARMMMUIdx_MPrivNegPri:
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case ARMMMUIdx_MUserNegPri:
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case ARMMMUIdx_MPriv:
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case ARMMMUIdx_MUser:
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case ARMMMUIdx_MSPrivNegPri:
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case ARMMMUIdx_MSUserNegPri:
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case ARMMMUIdx_MSPriv:
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case ARMMMUIdx_MSUser:
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return 1;
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default:
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g_assert_not_reached();
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}
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}
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uint64_t arm_sctlr(CPUARMState *env, int el)
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{
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/* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */
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@ -914,6 +914,42 @@ static inline bool regime_is_pan(CPUARMState *env, ARMMMUIdx mmu_idx)
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}
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}
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/* Return the exception level which controls this address translation regime */
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static inline uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx)
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{
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switch (mmu_idx) {
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case ARMMMUIdx_E20_0:
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case ARMMMUIdx_E20_2:
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case ARMMMUIdx_E20_2_PAN:
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case ARMMMUIdx_Stage2:
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case ARMMMUIdx_E2:
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return 2;
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case ARMMMUIdx_SE3:
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return 3;
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case ARMMMUIdx_SE10_0:
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return arm_el_is_aa64(env, 3) ? 1 : 3;
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case ARMMMUIdx_SE10_1:
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case ARMMMUIdx_SE10_1_PAN:
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case ARMMMUIdx_Stage1_E0:
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case ARMMMUIdx_Stage1_E1:
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case ARMMMUIdx_Stage1_E1_PAN:
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case ARMMMUIdx_E10_0:
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case ARMMMUIdx_E10_1:
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case ARMMMUIdx_E10_1_PAN:
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case ARMMMUIdx_MPrivNegPri:
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case ARMMMUIdx_MUserNegPri:
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case ARMMMUIdx_MPriv:
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case ARMMMUIdx_MUser:
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case ARMMMUIdx_MSPrivNegPri:
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case ARMMMUIdx_MSUserNegPri:
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case ARMMMUIdx_MSPriv:
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case ARMMMUIdx_MSUser:
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return 1;
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default:
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g_assert_not_reached();
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}
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}
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/* Return the FSR value for a debug exception (watchpoint, hardware
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* breakpoint or BKPT insn) targeting the specified exception level.
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*/
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