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cpu-exec: Purge all uses of ENV_GET_CPU()
Remove un-needed usages of ENV_GET_CPU() by converting the APIs to use CPUState pointers and retrieving the env_ptr as minimally needed. Scripted conversion for target-* change: for I in target-*/cpu.h; do sed -i \ 's/\(^int cpu_[^_]*_exec(\)[^ ][^ ]* \*s);$/\1CPUState *cpu);/' \ $I; done Backports commit ea3e9847408131abc840240bd61e892d28459452 from qemu
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@ -28,10 +28,10 @@
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#include "uc_priv.h"
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static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr);
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static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc,
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static TranslationBlock *tb_find_slow(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint64_t flags);
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static TranslationBlock *tb_find_fast(CPUArchState *env);
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static void cpu_handle_debug_exception(CPUArchState *env);
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static TranslationBlock *tb_find_fast(CPUState *cpu);
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static void cpu_handle_debug_exception(CPUState *cpu);
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void cpu_loop_exit(CPUState *cpu)
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{
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@ -55,9 +55,9 @@ void cpu_resume_from_signal(CPUState *cpu, void *puc)
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/* main execution loop */
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int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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int cpu_exec(struct uc_struct *uc, CPUState *cpu)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUArchState *env = cpu->env_ptr;
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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CPUClass *cc = CPU_GET_CLASS(uc, cpu);
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#ifdef TARGET_I386
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@ -116,7 +116,7 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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/* exit request from the cpu execution loop */
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ret = cpu->exception_index;
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if (ret == EXCP_DEBUG) {
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cpu_handle_debug_exception(env);
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cpu_handle_debug_exception(cpu);
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}
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break;
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} else {
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@ -211,7 +211,7 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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cpu->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit(cpu);
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}
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tb = tb_find_fast(env); // qq
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tb = tb_find_fast(cpu); // UNICORN
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if (!tb) { // invalid TB due to invalid code?
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uc->invalid_error = UC_ERR_FETCH_UNMAPPED;
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ret = EXCP_HLT;
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@ -243,7 +243,7 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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if (likely(!cpu->exit_request)) {
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tc_ptr = tb->tc_ptr;
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/* execute the generated code */
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next_tb = cpu_tb_exec(cpu, tc_ptr); // qq
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next_tb = cpu_tb_exec(cpu, tc_ptr); // UNICORN
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switch (next_tb & TB_EXIT_MASK) {
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case TB_EXIT_REQUESTED:
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@ -335,10 +335,12 @@ static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
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return next_tb;
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}
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static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc,
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target_ulong cs_base, uint64_t flags) // qq
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static TranslationBlock *tb_find_slow(CPUState *cpu,
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target_ulong pc,
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target_ulong cs_base,
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uint64_t flags)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUArchState *env = (CPUArchState *)cpu->env_ptr;
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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TranslationBlock *tb, **ptb1;
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unsigned int h;
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@ -394,9 +396,9 @@ found:
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return tb;
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}
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static TranslationBlock *tb_find_fast(CPUArchState *env) // qq
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static TranslationBlock *tb_find_fast(CPUState *cpu)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUArchState *env = (CPUArchState *)cpu->env_ptr;
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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int flags;
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@ -408,15 +410,14 @@ static TranslationBlock *tb_find_fast(CPUArchState *env) // qq
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tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
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if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
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tb->flags != flags)) {
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tb = tb_find_slow(env, pc, cs_base, flags); // qq
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tb = tb_find_slow(cpu, pc, cs_base, flags); // qq
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}
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return tb;
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}
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static void cpu_handle_debug_exception(CPUArchState *env)
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static void cpu_handle_debug_exception(CPUState *cpu)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUClass *cc = CPU_GET_CLASS(env->uc, cpu);
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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CPUWatchpoint *wp;
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if (!cpu->watchpoint_hit) {
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@ -117,8 +117,7 @@ static int qemu_tcg_init_vcpu(CPUState *cpu)
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static int tcg_cpu_exec(struct uc_struct *uc, CPUState *cpu)
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{
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CPUArchState *env = cpu->env_ptr;
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return cpu_exec(uc, env);
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return cpu_exec(uc, cpu);
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}
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static bool tcg_exec_all(struct uc_struct* uc)
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@ -507,7 +507,7 @@ typedef struct CPUARMState {
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#include "cpu-qom.h"
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ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model);
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int cpu_arm_exec(struct uc_struct *uc, CPUARMState *s);
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int cpu_arm_exec(struct uc_struct *uc, CPUState *cpu);
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uint32_t do_arm_semihosting(CPUARMState *env);
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void aarch64_sync_32_to_64(CPUARMState *env);
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void aarch64_sync_64_to_32(CPUARMState *env);
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@ -980,7 +980,7 @@ typedef struct CPUX86State {
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#include "cpu-qom.h"
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X86CPU *cpu_x86_create(struct uc_struct *uc, const char *cpu_model, Error **errp);
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int cpu_x86_exec(struct uc_struct *uc, CPUX86State *s);
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int cpu_x86_exec(struct uc_struct *uc, CPUState *cpu);
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void x86_cpudef_setup(void);
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int cpu_x86_support_mca_broadcast(CPUX86State *env);
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@ -121,7 +121,7 @@ typedef struct CPUM68KState {
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void m68k_tcg_init(struct uc_struct *uc);
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M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model);
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int cpu_m68k_exec(struct uc_struct *uc, CPUM68KState *s);
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int cpu_m68k_exec(struct uc_struct *uc, CPUState *cpu);
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/* you can call this signal handler from your SIGBUS and SIGSEGV
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signal handlers to inform the virtual CPU of exceptions. non zero
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is returned if the signal was handled by the virtual CPU. */
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@ -752,7 +752,7 @@ enum {
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*/
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#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
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int cpu_mips_exec(struct uc_struct *uc, CPUMIPSState *s);
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int cpu_mips_exec(struct uc_struct *uc, CPUState *cpu);
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void mips_tcg_init(struct uc_struct *uc);
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MIPSCPU *cpu_mips_init(struct uc_struct *uc, const char *cpu_model);
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int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
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@ -542,7 +542,7 @@ int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
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void gen_intermediate_code_init(CPUSPARCState *env);
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/* cpu-exec.c */
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int cpu_sparc_exec(struct uc_struct *uc, CPUSPARCState *s);
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int cpu_sparc_exec(struct uc_struct *uc, CPUState *cpu);
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/* win_helper.c */
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target_ulong cpu_get_psr(CPUSPARCState *env1);
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