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target/riscv: Set the virtualised MMU mode when doing hyp accesses

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When performing the hypervisor load/store operations set the MMU mode to
indicate that we are virtualised.

Backports 3e5979046f3f5f65828d3950d0c3ec9846d63715
This commit is contained in:
Alistair Francis 2021-03-08 14:57:56 -05:00 committed by Lioncash
parent a998c18ad8
commit e5a9b8fc17
1 changed files with 5 additions and 4 deletions
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9
qemu/target/riscv/op_helper.c
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@ -235,7 +235,7 @@ target_ulong helper_hyp_load(CPURISCVState *env, target_ulong address,
(env->priv == PRV_U && !riscv_cpu_virt_enabled(env) && (env->priv == PRV_U && !riscv_cpu_virt_enabled(env) &&
get_field(env->hstatus, HSTATUS_HU))) { get_field(env->hstatus, HSTATUS_HU))) {
target_ulong pte; target_ulong pte;
int mmu_idx = cpu_mmu_index(env, false); int mmu_idx = cpu_mmu_index(env, false) | TB_FLAGS_PRIV_HYP_ACCESS_MASK;
riscv_cpu_set_two_stage_lookup(env, true); riscv_cpu_set_two_stage_lookup(env, true);
@ -285,8 +285,8 @@ void helper_hyp_store(CPURISCVState *env, target_ulong address,
(env->priv == PRV_S && !riscv_cpu_virt_enabled(env)) || (env->priv == PRV_S && !riscv_cpu_virt_enabled(env)) ||
(env->priv == PRV_U && !riscv_cpu_virt_enabled(env) && (env->priv == PRV_U && !riscv_cpu_virt_enabled(env) &&
get_field(env->hstatus, HSTATUS_HU))) { get_field(env->hstatus, HSTATUS_HU))) {
int mmu_idx = cpu_mmu_index(env, false) | TB_FLAGS_PRIV_HYP_ACCESS_MASK;
riscv_cpu_set_two_stage_lookup(env, true); riscv_cpu_set_two_stage_lookup(env, true);
int mmu_idx = cpu_mmu_index(env, false);
switch (memop) { switch (memop) {
case MO_SB: case MO_SB:
@ -328,15 +328,16 @@ target_ulong helper_hyp_x_load(CPURISCVState *env, target_ulong address,
(env->priv == PRV_U && !riscv_cpu_virt_enabled(env) && (env->priv == PRV_U && !riscv_cpu_virt_enabled(env) &&
get_field(env->hstatus, HSTATUS_HU))) { get_field(env->hstatus, HSTATUS_HU))) {
target_ulong pte; target_ulong pte;
int mmu_idx = cpu_mmu_index(env, false) | TB_FLAGS_PRIV_HYP_ACCESS_MASK;
riscv_cpu_set_two_stage_lookup(env, true); riscv_cpu_set_two_stage_lookup(env, true);
switch (memop) { switch (memop) {
case MO_TEUW: case MO_TEUW:
pte = cpu_lduw_mmuidx_ra(env, address, cpu_mmu_index(env, true), GETPC()); pte = cpu_lduw_mmuidx_ra(env, address, mmu_idx, GETPC());
break; break;
case MO_TEUL: case MO_TEUL:
pte = cpu_ldl_mmuidx_ra(env, address, cpu_mmu_index(env, true), GETPC()); pte = cpu_ldl_mmuidx_ra(env, address, mmu_idx, GETPC());
break; break;
default: default:
g_assert_not_reached(); g_assert_not_reached();