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target-i386: Ensure bit 10 on DR7 is never cleared

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Bit 10 of DR7 is documented as always set to 1, so ensure that's
always the case.

Backports commit 9055330ffbf5ca85f024c29874799d9c8bd17aa9 from qemu
This commit is contained in:
Eduardo Habkost 2018-02-16 16:08:38 -05:00 committed by Lioncash
parent 77b129a1c6
commit e88063fa05
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1 changed files with 2 additions and 0 deletions
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qemu/target-i386/bpt_helper.c
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@ -84,6 +84,8 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
int i;
target_ulong old_dr7 = env->dr[7];
new_dr7 |= DR7_FIXED_1;
/* If nothing is changing except the global/local enable bits,
then we can make the change more efficient. */
if (((old_dr7 ^ new_dr7) & ~0xff) == 0) {