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target-mips: Add missing calls to synchronise SoftFloat status
Add missing calls to synchronise the SoftFloat status with the CP1.FSCR: + for the rounding and flush-to-zero modes upon processor reset, + for the flush-to-zero mode on FSCR updates through the GDB stub. Refactor code accordingly and remove the redundant RESTORE_ROUNDING_MODE macro. Backports commit bb962386b82c1b0e9e12fdb6b9bb62106bf1f822 from qemu
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@ -771,6 +771,19 @@ target_ulong exception_resume_pc (CPUMIPSState *env);
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extern unsigned int ieee_rm[];
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int ieee_ex_to_mips(int xcpt);
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static inline void restore_rounding_mode(CPUMIPSState *env)
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{
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set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
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&env->active_fpu.fp_status);
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}
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static inline void restore_flush_mode(CPUMIPSState *env)
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{
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set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0,
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&env->active_fpu.fp_status);
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}
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static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
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target_ulong *cs_base, int *flags)
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{
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@ -2283,18 +2283,6 @@ unsigned int ieee_rm[] = {
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float_round_down
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};
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static inline void restore_rounding_mode(CPUMIPSState *env)
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{
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set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
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&env->active_fpu.fp_status);
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}
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static inline void restore_flush_mode(CPUMIPSState *env)
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{
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set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0,
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&env->active_fpu.fp_status);
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}
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target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
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{
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target_ulong arg1 = 0;
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@ -19826,6 +19826,8 @@ void cpu_state_reset(CPUMIPSState *env)
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}
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compute_hflags(env);
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restore_rounding_mode(env);
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restore_flush_mode(env);
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cs->exception_index = EXCP_NONE;
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}
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