target/arm: Only flush tlb if ASID changes

Since QEMU does not implement ASIDs, changes to the ASID must flush the
tlb. However, if the ASID does not change there is no reason to flush.

In testing a boot of the Ubuntu installer to the first menu, this reduces
the number of flushes by 30%, or nearly 600k instances.

Backports commit 93f379b0c43617b1361f742f261479eaed4959cb from qemu
This commit is contained in:
Richard Henderson 2018-11-10 11:26:22 -05:00 committed by Lioncash
parent 15a6b3f771
commit e9fe7d3c8d
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GPG key ID: 4E3C3CC1031BA9C7

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@ -2448,12 +2448,10 @@ static void vmsa_tcr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri,
static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
/* 64 bit accesses to the TTBRs can change the ASID and so we
* must flush the TLB.
*/
if (cpreg_field_is_64bit(ri)) {
/* If the ASID changes (with a 64-bit write), we must flush the TLB. */
if (cpreg_field_is_64bit(ri) &&
extract64(raw_read(env, ri) ^ value, 48, 16) != 0) {
ARMCPU *cpu = arm_env_get_cpu(env);
tlb_flush(CPU(cpu));
}
raw_write(env, ri, value);