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target/m68k: add andi/ori/eori to SR/CCR

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Backports commit b5ae1edc294f78865ede38377c0a9b92da4370e0 from qemu
This commit is contained in:
Laurent Vivier 2018-03-06 08:35:59 -05:00 committed by Lioncash
parent 9527a5c994
commit ec1c2e9576
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 46 additions and 7 deletions
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53
qemu/target/m68k/translate.c
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@ -2271,6 +2271,7 @@ DISAS_INSN(arith_im)
TCGv dest; TCGv dest;
TCGv addr; TCGv addr;
int opsize; int opsize;
bool with_SR = ((insn & 0x3f) == 0x3c);
op = (insn >> 9) & 7; op = (insn >> 9) & 7;
opsize = insn_opsize(insn); opsize = insn_opsize(insn);
@ -2287,32 +2288,73 @@ DISAS_INSN(arith_im)
default: default:
abort(); abort();
} }
SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr);
if (with_SR) {
/* SR/CCR can only be used with andi/eori/ori */
if (op == 2 || op == 3 || op == 6) {
disas_undef(env, s, insn);
return;
}
switch (opsize) {
case OS_BYTE:
src1 = gen_get_ccr(s);
break;
case OS_WORD:
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
src1 = gen_get_sr(s);
break;
case OS_LONG:
disas_undef(env, s, insn);
return;
}
} else {
SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr);
}
dest = tcg_temp_new(tcg_ctx); dest = tcg_temp_new(tcg_ctx);
switch (op) { switch (op) {
case 0: /* ori */ case 0: /* ori */
tcg_gen_or_i32(tcg_ctx, dest, src1, im); tcg_gen_or_i32(tcg_ctx, dest, src1, im);
gen_logic_cc(s, dest, opsize); if (with_SR) {
gen_set_sr(s, dest, opsize == OS_BYTE);
} else {
DEST_EA(env, insn, opsize, dest, &addr);
gen_logic_cc(s, dest, opsize);
}
break; break;
case 1: /* andi */ case 1: /* andi */
tcg_gen_and_i32(tcg_ctx, dest, src1, im); tcg_gen_and_i32(tcg_ctx, dest, src1, im);
gen_logic_cc(s, dest, opsize); if (with_SR) {
gen_set_sr(s, dest, opsize == OS_BYTE);
} else {
DEST_EA(env, insn, opsize, dest, &addr);
gen_logic_cc(s, dest, opsize);
}
break; break;
case 2: /* subi */ case 2: /* subi */
tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, src1, im); tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, src1, im);
tcg_gen_sub_i32(tcg_ctx, dest, src1, im); tcg_gen_sub_i32(tcg_ctx, dest, src1, im);
gen_update_cc_add(s, dest, im, opsize); gen_update_cc_add(s, dest, im, opsize);
set_cc_op(s, CC_OP_SUBB + opsize); set_cc_op(s, CC_OP_SUBB + opsize);
DEST_EA(env, insn, opsize, dest, &addr);
break; break;
case 3: /* addi */ case 3: /* addi */
tcg_gen_add_i32(tcg_ctx, dest, src1, im); tcg_gen_add_i32(tcg_ctx, dest, src1, im);
gen_update_cc_add(s, dest, im, opsize); gen_update_cc_add(s, dest, im, opsize);
tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, dest, im); tcg_gen_setcond_i32(tcg_ctx, TCG_COND_LTU, tcg_ctx->QREG_CC_X, dest, im);
set_cc_op(s, CC_OP_ADDB + opsize); set_cc_op(s, CC_OP_ADDB + opsize);
DEST_EA(env, insn, opsize, dest, &addr);
break; break;
case 5: /* eori */ case 5: /* eori */
tcg_gen_xor_i32(tcg_ctx, dest, src1, im); tcg_gen_xor_i32(tcg_ctx, dest, src1, im);
gen_logic_cc(s, dest, opsize); if (with_SR) {
gen_set_sr(s, dest, opsize == OS_BYTE);
} else {
DEST_EA(env, insn, opsize, dest, &addr);
gen_logic_cc(s, dest, opsize);
}
break; break;
case 6: /* cmpi */ case 6: /* cmpi */
gen_update_cc_cmp(s, src1, im, opsize); gen_update_cc_cmp(s, src1, im, opsize);
@ -2321,9 +2363,6 @@ DISAS_INSN(arith_im)
abort(); abort();
} }
tcg_temp_free(tcg_ctx, im); tcg_temp_free(tcg_ctx, im);
if (op != 6) {
DEST_EA(env, insn, opsize, dest, &addr);
}
tcg_temp_free(tcg_ctx, dest); tcg_temp_free(tcg_ctx, dest);
} }