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target-m68k: Introduce DisasCompare
Backports commit 6a432295d73df91890dc70c4a94dcc4ba88ad1c3 from qemu
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4e498cc54d
commit
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@ -748,8 +748,17 @@ static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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return tcg_ctx->NULL_QREG;
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return tcg_ctx->NULL_QREG;
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}
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}
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typedef struct {
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TCGCond tcond;
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bool g1;
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bool g2;
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TCGv v1;
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TCGv v2;
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} DisasCompare;
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/* This generates a conditional branch, clobbering all temporaries. */
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/* This generates a conditional branch, clobbering all temporaries. */
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static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
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static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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{
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv tmp, tmp2;
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TCGv tmp, tmp2;
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@ -758,61 +767,96 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
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/* TODO: Optimize compare/branch pairs rather than always flushing
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/* TODO: Optimize compare/branch pairs rather than always flushing
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flag state to CC_OP_FLAGS. */
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flag state to CC_OP_FLAGS. */
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gen_flush_flags(s);
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gen_flush_flags(s);
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update_cc_op(s);
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c->g1 = 1;
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c->g2 = 0;
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c->v2 = tcg_const_i32(tcg_ctx, 0);
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switch (cond) {
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switch (cond) {
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case 0: /* T */
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case 0: /* T */
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tcg_gen_br(tcg_ctx, l1);
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return;
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case 1: /* F */
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case 1: /* F */
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return;
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c->v1 = c->v2;
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tcond = TCG_COND_NEVER;
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break;
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case 2: /* HI (!C && !Z) -> !(C || Z)*/
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case 2: /* HI (!C && !Z) -> !(C || Z)*/
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case 3: /* LS (C || Z) */
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case 3: /* LS (C || Z) */
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tmp = tcg_temp_new(tcg_ctx);
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c->v1 = tmp = tcg_temp_new(tcg_ctx);
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c->g1 = 0;
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tcg_gen_setcond_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->QREG_CC_Z, c->v2);
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tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->QREG_CC_Z, 0);
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tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->QREG_CC_Z, 0);
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tcg_gen_or_i32(tcg_ctx, tmp, tmp, tcg_ctx->QREG_CC_C);
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tcg_gen_or_i32(tcg_ctx, tmp, tmp, tcg_ctx->QREG_CC_C);
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tcond = (cond & 1 ? TCG_COND_NE : TCG_COND_EQ);
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tcond = TCG_COND_NE;
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break;
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break;
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case 4: /* CC (!C) */
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case 4: /* CC (!C) */
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case 5: /* CS (C) */
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case 5: /* CS (C) */
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tmp = tcg_ctx->QREG_CC_C;
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c->v1 = tcg_ctx->QREG_CC_C;
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tcond = (cond & 1 ? TCG_COND_NE : TCG_COND_EQ);
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tcond = TCG_COND_NE;
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break;
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break;
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case 6: /* NE (!Z) */
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case 6: /* NE (!Z) */
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case 7: /* EQ (Z) */
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case 7: /* EQ (Z) */
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tmp = tcg_ctx->QREG_CC_Z;
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c->v1 = tcg_ctx->QREG_CC_Z;
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tcond = (cond & 1 ? TCG_COND_EQ : TCG_COND_NE);
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tcond = TCG_COND_EQ;
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break;
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break;
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case 8: /* VC (!V) */
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case 8: /* VC (!V) */
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case 9: /* VS (V) */
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case 9: /* VS (V) */
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tmp = tcg_ctx->QREG_CC_V;
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c->v1 = tcg_ctx->QREG_CC_V;
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tcond = (cond & 1 ? TCG_COND_LT : TCG_COND_GE);
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tcond = TCG_COND_LT;
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break;
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break;
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case 10: /* PL (!N) */
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case 10: /* PL (!N) */
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case 11: /* MI (N) */
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case 11: /* MI (N) */
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tmp = tcg_ctx->QREG_CC_N;
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c->v1 = tcg_ctx->QREG_CC_N;
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tcond = (cond & 1 ? TCG_COND_LT : TCG_COND_GE);
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tcond = TCG_COND_LT;
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break;
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break;
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case 12: /* GE (!(N ^ V)) */
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case 12: /* GE (!(N ^ V)) */
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case 13: /* LT (N ^ V) */
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case 13: /* LT (N ^ V) */
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tmp = tcg_temp_new(tcg_ctx);
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c->v1 = tmp = tcg_temp_new(tcg_ctx);
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c->g1 = 0;
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tcg_gen_xor_i32(tcg_ctx, tmp, tcg_ctx->QREG_CC_N, tcg_ctx->QREG_CC_V);
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tcg_gen_xor_i32(tcg_ctx, tmp, tcg_ctx->QREG_CC_N, tcg_ctx->QREG_CC_V);
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tcond = (cond & 1 ? TCG_COND_LT : TCG_COND_GE);
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tcond = TCG_COND_LT;
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break;
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break;
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case 14: /* GT (!(Z || (N ^ V))) */
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case 14: /* GT (!(Z || (N ^ V))) */
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case 15: /* LE (Z || (N ^ V)) */
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case 15: /* LE (Z || (N ^ V)) */
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tmp = tcg_temp_new(tcg_ctx);
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c->v1 = tmp = tcg_temp_new(tcg_ctx);
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tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->QREG_CC_Z, 0);
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c->g1 = 0;
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tcg_gen_setcond_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->QREG_CC_Z, c->v2);
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tcg_gen_neg_i32(tcg_ctx, tmp, tmp);
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tcg_gen_neg_i32(tcg_ctx, tmp, tmp);
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tmp2 = tcg_temp_new(tcg_ctx);
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tmp2 = tcg_temp_new(tcg_ctx);
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tcg_gen_xor_i32(tcg_ctx, tmp2, tcg_ctx->QREG_CC_N, tcg_ctx->QREG_CC_V);
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tcg_gen_xor_i32(tcg_ctx, tmp2, tcg_ctx->QREG_CC_N, tcg_ctx->QREG_CC_V);
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tcg_gen_or_i32(tcg_ctx, tmp, tmp, tmp2);
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tcg_gen_or_i32(tcg_ctx, tmp, tmp, tmp2);
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tcond = (cond & 1 ? TCG_COND_LT : TCG_COND_GE);
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tcg_temp_free(tcg_ctx, tmp2);
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tcond = TCG_COND_LT;
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break;
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break;
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default:
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default:
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/* Should ever happen. */
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/* Should ever happen. */
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abort();
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abort();
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}
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}
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tcg_gen_brcondi_i32(tcg_ctx, tcond, tmp, 0, l1);
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if ((cond & 1) == 0) {
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tcond = tcg_invert_cond(tcond);
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}
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c->tcond = tcond;
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}
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static void free_cond(DisasContext *s, DisasCompare *c)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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if (!c->g1) {
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tcg_temp_free(tcg_ctx, c->v1);
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}
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if (!c->g2) {
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tcg_temp_free(tcg_ctx, c->v2);
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}
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}
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static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
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{
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DisasCompare c;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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gen_cc_cond(&c, s, cond);
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update_cc_op(s);
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tcg_gen_brcond_i32(tcg_ctx, c.tcond, c.v1, c.v2, l1);
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free_cond(s, &c);
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}
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}
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DISAS_INSN(scc)
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DISAS_INSN(scc)
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@ -1708,7 +1752,6 @@ DISAS_INSN(branch)
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/* bsr */
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/* bsr */
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gen_push(s, tcg_const_i32(tcg_ctx, s->pc));
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gen_push(s, tcg_const_i32(tcg_ctx, s->pc));
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}
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}
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update_cc_op(s);
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if (op > 1) {
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if (op > 1) {
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/* Bcc */
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/* Bcc */
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l1 = gen_new_label(tcg_ctx);
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l1 = gen_new_label(tcg_ctx);
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