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target-i386: Introduce mo_stacksize

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Centralize computation of a MO_SIZE for the stack pointer.

Backports commit 64ae256c2450262e27f07657c5734d3197458d95 from qemu
This commit is contained in:
Richard Henderson 2018-02-20 09:18:44 -05:00 committed by Lioncash
parent 63c4e79870
commit f3220dbb8c
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 10 additions and 14 deletions
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24
qemu/target-i386/translate.c
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@ -369,6 +369,12 @@ static inline TCGMemOp mo_pushpop(DisasContext *s, TCGMemOp ot)
} }
} }
/* Select the size of the stack pointer. */
static inline TCGMemOp mo_stacksize(DisasContext *s)
{
return CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
}
/* Select only size 64 else 32. Used for SSE operand sizes. */ /* Select only size 64 else 32. Used for SSE operand sizes. */
static inline TCGMemOp mo_64_32(TCGMemOp ot) static inline TCGMemOp mo_64_32(TCGMemOp ot)
{ {
@ -2575,22 +2581,14 @@ static inline void gen_stack_update(DisasContext *s, int addend)
{ {
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
#ifdef TARGET_X86_64 gen_op_add_reg_im(tcg_ctx, mo_stacksize(s), R_ESP, addend);
if (CODE64(s)) {
gen_op_add_reg_im(tcg_ctx, MO_64, R_ESP, addend);
} else
#endif
if (s->ss32) {
gen_op_add_reg_im(tcg_ctx, MO_32, R_ESP, addend);
} else {
gen_op_add_reg_im(tcg_ctx, MO_16, R_ESP, addend);
}
} }
/* Generate a push. It depends on ss32, addseg and dflag. */ /* Generate a push. It depends on ss32, addseg and dflag. */
static void gen_push_v(DisasContext *s, TCGv val) static void gen_push_v(DisasContext *s, TCGv val)
{ {
TCGMemOp a_ot, d_ot = mo_pushpop(s, s->dflag); TCGMemOp d_ot = mo_pushpop(s, s->dflag);
TCGMemOp a_ot = mo_stacksize(s);
int size = 1 << d_ot; int size = 1 << d_ot;
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv cpu_A0 = *(TCGv *)tcg_ctx->cpu_A0; TCGv cpu_A0 = *(TCGv *)tcg_ctx->cpu_A0;
@ -2601,9 +2599,8 @@ static void gen_push_v(DisasContext *s, TCGv val)
tcg_gen_subi_tl(tcg_ctx, cpu_A0, *cpu_regs[R_ESP], size); tcg_gen_subi_tl(tcg_ctx, cpu_A0, *cpu_regs[R_ESP], size);
if (CODE64(s)) { if (CODE64(s)) {
a_ot = MO_64; /* No special handling. */
} else if (s->ss32) { } else if (s->ss32) {
a_ot = MO_32;
if (s->addseg) { if (s->addseg) {
new_esp = cpu_tmp4; new_esp = cpu_tmp4;
tcg_gen_mov_tl(tcg_ctx, new_esp, cpu_A0); tcg_gen_mov_tl(tcg_ctx, new_esp, cpu_A0);
@ -2612,7 +2609,6 @@ static void gen_push_v(DisasContext *s, TCGv val)
tcg_gen_ext32u_tl(tcg_ctx, cpu_A0, cpu_A0); tcg_gen_ext32u_tl(tcg_ctx, cpu_A0, cpu_A0);
} }
} else { } else {
a_ot = MO_16;
new_esp = cpu_tmp4; new_esp = cpu_tmp4;
tcg_gen_ext16u_tl(tcg_ctx, cpu_A0, cpu_A0); tcg_gen_ext16u_tl(tcg_ctx, cpu_A0, cpu_A0);
tcg_gen_mov_tl(tcg_ctx, new_esp, cpu_A0); tcg_gen_mov_tl(tcg_ctx, new_esp, cpu_A0);