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target/arm: Convert VADD to decodetree
Convert the VADD instruction to decodetree. Backports commit ce28b303716e7eca3f3765bf6776d722ebbe1122 from qemu
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parent
06584edf61
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@ -1470,3 +1470,13 @@ static bool trans_VNMUL_dp(DisasContext *s, arg_VNMUL_sp *a)
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{
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return do_vfp_3op_dp(s, gen_VNMUL_dp, a->vd, a->vn, a->vm, false);
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}
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static bool trans_VADD_sp(DisasContext *s, arg_VADD_sp *a)
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{
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return do_vfp_3op_sp(s, gen_helper_vfp_adds, a->vd, a->vn, a->vm, false);
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}
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static bool trans_VADD_dp(DisasContext *s, arg_VADD_sp *a)
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{
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return do_vfp_3op_dp(s, gen_helper_vfp_addd, a->vd, a->vn, a->vm, false);
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}
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@ -1442,7 +1442,6 @@ static inline void gen_vfp_##name(DisasContext *s, int dp)
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tcg_temp_free_ptr(tcg_ctx, fpst); \
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}
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VFP_OP2(add)
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VFP_OP2(sub)
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VFP_OP2(div)
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@ -3213,7 +3212,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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rn = VFP_SREG_N(insn);
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switch (op) {
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case 0 ... 5:
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case 0 ... 6:
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/* Already handled by decodetree */
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return 1;
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default:
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@ -3399,9 +3398,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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for (;;) {
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/* Perform the calculation. */
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switch (op) {
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case 6: /* add: fn + fm */
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gen_vfp_add(s, dp);
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break;
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case 7: /* sub: fn - fm */
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gen_vfp_sub(s, dp);
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break;
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@ -127,3 +127,8 @@ VNMUL_sp ---- 1110 0.10 .... .... 1010 .1.0 .... \
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vm=%vm_sp vn=%vn_sp vd=%vd_sp
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VNMUL_dp ---- 1110 0.10 .... .... 1011 .1.0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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VADD_sp ---- 1110 0.11 .... .... 1010 .0.0 .... \
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vm=%vm_sp vn=%vn_sp vd=%vd_sp
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VADD_dp ---- 1110 0.11 .... .... 1011 .0.0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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