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target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd
This commit is contained in:
parent
aa97b6b755
commit
f5a21abc0b
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_aarch64
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_aarch64
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_aarch64
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_aarch64
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_aarch64
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_aarch64
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_aarch64
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#define helper_neon_sub_u16 helper_neon_sub_u16_aarch64
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#define helper_neon_sub_u8 helper_neon_sub_u8_aarch64
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#define helper_neon_subl_u16 helper_neon_subl_u16_aarch64
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@ -3661,6 +3665,10 @@
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#define helper_neon_ceq_f64 helper_neon_ceq_f64_aarch64
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#define helper_neon_cge_f64 helper_neon_cge_f64_aarch64
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#define helper_neon_cgt_f64 helper_neon_cgt_f64_aarch64
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_aarch64
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_aarch64
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_aarch64
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_aarch64
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#define helper_pacda helper_pacda_aarch64
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#define helper_pacdb helper_pacdb_aarch64
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#define helper_pacga helper_pacga_aarch64
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_aarch64eb
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_aarch64eb
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_aarch64eb
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_aarch64eb
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_aarch64eb
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_aarch64eb
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_aarch64eb
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#define helper_neon_sub_u16 helper_neon_sub_u16_aarch64eb
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#define helper_neon_sub_u8 helper_neon_sub_u8_aarch64eb
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#define helper_neon_subl_u16 helper_neon_subl_u16_aarch64eb
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@ -3661,6 +3665,10 @@
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#define helper_neon_ceq_f64 helper_neon_ceq_f64_aarch64eb
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#define helper_neon_cge_f64 helper_neon_cge_f64_aarch64eb
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#define helper_neon_cgt_f64 helper_neon_cgt_f64_aarch64eb
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_aarch64eb
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_aarch64eb
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_aarch64eb
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_aarch64eb
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#define helper_pacda helper_pacda_aarch64eb
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#define helper_pacdb helper_pacdb_aarch64eb
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#define helper_pacga helper_pacga_aarch64eb
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13
qemu/arm.h
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qemu/arm.h
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_arm
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_arm
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_arm
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_arm
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_arm
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_arm
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_arm
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#define helper_neon_sub_u16 helper_neon_sub_u16_arm
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#define helper_neon_sub_u8 helper_neon_sub_u8_arm
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#define helper_neon_subl_u16 helper_neon_subl_u16_arm
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@ -3523,6 +3527,15 @@
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#define gen_ushl_i32 gen_ushl_i32_arm
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#define gen_ushl_i64 gen_ushl_i64_arm
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#define helper_fjcvtzs helper_fjcvtzs_arm
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#define helper_gvec_mla_idx_d helper_gvec_mla_idx_d_arm
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#define helper_gvec_mla_idx_h helper_gvec_mla_idx_h_arm
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#define helper_gvec_mla_idx_s helper_gvec_mla_idx_s_arm
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#define helper_gvec_mls_idx_d helper_gvec_mls_idx_d_arm
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#define helper_gvec_mls_idx_h helper_gvec_mls_idx_h_arm
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#define helper_gvec_mls_idx_s helper_gvec_mls_idx_s_arm
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#define helper_gvec_mul_idx_d helper_gvec_mul_idx_d_arm
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#define helper_gvec_mul_idx_h helper_gvec_mul_idx_h_arm
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#define helper_gvec_mul_idx_s helper_gvec_mul_idx_s_arm
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#define helper_gvec_saba_b helper_gvec_saba_b_arm
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#define helper_gvec_saba_d helper_gvec_saba_d_arm
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#define helper_gvec_saba_h helper_gvec_saba_h_arm
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13
qemu/armeb.h
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qemu/armeb.h
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_armeb
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_armeb
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_armeb
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_armeb
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_armeb
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_armeb
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_armeb
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#define helper_neon_sub_u16 helper_neon_sub_u16_armeb
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#define helper_neon_sub_u8 helper_neon_sub_u8_armeb
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#define helper_neon_subl_u16 helper_neon_subl_u16_armeb
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@ -3523,6 +3527,15 @@
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#define gen_ushl_i32 gen_ushl_i32_armeb
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#define gen_ushl_i64 gen_ushl_i64_armeb
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#define helper_fjcvtzs helper_fjcvtzs_armeb
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#define helper_gvec_mla_idx_d helper_gvec_mla_idx_d_armeb
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#define helper_gvec_mla_idx_h helper_gvec_mla_idx_h_armeb
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#define helper_gvec_mla_idx_s helper_gvec_mla_idx_s_armeb
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#define helper_gvec_mls_idx_d helper_gvec_mls_idx_d_armeb
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#define helper_gvec_mls_idx_h helper_gvec_mls_idx_h_armeb
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#define helper_gvec_mls_idx_s helper_gvec_mls_idx_s_armeb
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#define helper_gvec_mul_idx_d helper_gvec_mul_idx_d_armeb
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#define helper_gvec_mul_idx_h helper_gvec_mul_idx_h_armeb
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#define helper_gvec_mul_idx_s helper_gvec_mul_idx_s_armeb
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#define helper_gvec_saba_b helper_gvec_saba_b_armeb
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#define helper_gvec_saba_d helper_gvec_saba_d_armeb
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#define helper_gvec_saba_h helper_gvec_saba_h_armeb
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@ -1713,6 +1713,10 @@ symbols = (
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'helper_neon_sqadd_u32',
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'helper_neon_sqadd_u64',
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'helper_neon_sqadd_u8',
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'helper_neon_sqdmulh_h',
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'helper_neon_sqdmulh_s',
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'helper_neon_sqrdmulh_h',
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'helper_neon_sqrdmulh_s',
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'helper_neon_sub_u16',
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'helper_neon_sub_u8',
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'helper_neon_subl_u16',
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@ -3532,6 +3536,15 @@ arm_symbols = (
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'gen_ushl_i32',
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'gen_ushl_i64',
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'helper_fjcvtzs',
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'helper_gvec_mla_idx_d',
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'helper_gvec_mla_idx_h',
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'helper_gvec_mla_idx_s',
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'helper_gvec_mls_idx_d',
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'helper_gvec_mls_idx_h',
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'helper_gvec_mls_idx_s',
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'helper_gvec_mul_idx_d',
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'helper_gvec_mul_idx_h',
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'helper_gvec_mul_idx_s',
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'helper_gvec_saba_b',
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'helper_gvec_saba_d',
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'helper_gvec_saba_h',
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@ -3801,6 +3814,10 @@ aarch64_symbols = (
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'helper_neon_ceq_f64',
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'helper_neon_cge_f64',
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'helper_neon_cgt_f64',
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'helper_neon_sqdmulh_h',
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'helper_neon_sqdmulh_s',
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'helper_neon_sqrdmulh_h',
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'helper_neon_sqrdmulh_s',
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'helper_pacda',
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'helper_pacdb',
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'helper_pacga',
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_m68k
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_m68k
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_m68k
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_m68k
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_m68k
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_m68k
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_m68k
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#define helper_neon_sub_u16 helper_neon_sub_u16_m68k
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#define helper_neon_sub_u8 helper_neon_sub_u8_m68k
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#define helper_neon_subl_u16 helper_neon_subl_u16_m68k
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_mips
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_mips
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_mips
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_mips
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_mips
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_mips
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_mips
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#define helper_neon_sub_u16 helper_neon_sub_u16_mips
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#define helper_neon_sub_u8 helper_neon_sub_u8_mips
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#define helper_neon_subl_u16 helper_neon_subl_u16_mips
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@ -1707,6 +1707,10 @@
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_mips64
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_mips64
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_mips64
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_mips64
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_mips64
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_mips64
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_mips64
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#define helper_neon_sub_u16 helper_neon_sub_u16_mips64
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#define helper_neon_sub_u8 helper_neon_sub_u8_mips64
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#define helper_neon_subl_u16 helper_neon_subl_u16_mips64
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_mips64el
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_mips64el
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_mips64el
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_mips64el
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_mips64el
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_mips64el
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_mips64el
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#define helper_neon_sub_u16 helper_neon_sub_u16_mips64el
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#define helper_neon_sub_u8 helper_neon_sub_u8_mips64el
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#define helper_neon_subl_u16 helper_neon_subl_u16_mips64el
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_mipsel
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_mipsel
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_mipsel
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_mipsel
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_mipsel
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_mipsel
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_mipsel
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#define helper_neon_sub_u16 helper_neon_sub_u16_mipsel
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#define helper_neon_sub_u8 helper_neon_sub_u8_mipsel
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#define helper_neon_subl_u16 helper_neon_subl_u16_mipsel
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_powerpc
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_powerpc
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_powerpc
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_powerpc
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_powerpc
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_powerpc
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_powerpc
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#define helper_neon_sub_u16 helper_neon_sub_u16_powerpc
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#define helper_neon_sub_u8 helper_neon_sub_u8_powerpc
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#define helper_neon_subl_u16 helper_neon_subl_u16_powerpc
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_riscv32
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_riscv32
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_riscv32
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_riscv32
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_riscv32
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_riscv32
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_riscv32
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#define helper_neon_sub_u16 helper_neon_sub_u16_riscv32
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#define helper_neon_sub_u8 helper_neon_sub_u8_riscv32
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#define helper_neon_subl_u16 helper_neon_subl_u16_riscv32
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_riscv64
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_riscv64
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_riscv64
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_riscv64
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_riscv64
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_riscv64
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_riscv64
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#define helper_neon_sub_u16 helper_neon_sub_u16_riscv64
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#define helper_neon_sub_u8 helper_neon_sub_u8_riscv64
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#define helper_neon_subl_u16 helper_neon_subl_u16_riscv64
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_sparc
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_sparc
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_sparc
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_sparc
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_sparc
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_sparc
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_sparc
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#define helper_neon_sub_u16 helper_neon_sub_u16_sparc
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#define helper_neon_sub_u8 helper_neon_sub_u8_sparc
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#define helper_neon_subl_u16 helper_neon_subl_u16_sparc
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#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_sparc64
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#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_sparc64
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#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_sparc64
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#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_sparc64
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#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_sparc64
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#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_sparc64
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#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_sparc64
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#define helper_neon_sub_u16 helper_neon_sub_u16_sparc64
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#define helper_neon_sub_u8 helper_neon_sub_u8_sparc64
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#define helper_neon_subl_u16 helper_neon_subl_u16_sparc64
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@ -774,6 +774,16 @@ DEF_HELPER_FLAGS_5(gvec_mls_idx_s, TCG_CALL_NO_RWG,
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DEF_HELPER_FLAGS_5(gvec_mls_idx_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(neon_sqdmulh_h, TCG_CALL_NO_RWG,
|
||||
void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(neon_sqdmulh_s, TCG_CALL_NO_RWG,
|
||||
void, ptr, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_5(neon_sqrdmulh_h, TCG_CALL_NO_RWG,
|
||||
void, ptr, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_5(neon_sqrdmulh_s, TCG_CALL_NO_RWG,
|
||||
void, ptr, ptr, ptr, ptr, i32)
|
||||
|
||||
#ifdef TARGET_ARM
|
||||
#define helper_clz helper_clz_arm
|
||||
#define gen_helper_clz gen_helper_clz_arm
|
||||
|
|
|
@ -851,6 +851,21 @@ static void gen_gvec_op3_fpst(DisasContext *s, bool is_q, int rd, int rn,
|
|||
tcg_temp_free_ptr(tcg_ctx, fpst);
|
||||
}
|
||||
|
||||
/* Expand a 3-operand + qc + operation using an out-of-line helper. */
|
||||
static void gen_gvec_op3_qc(DisasContext *s, bool is_q, int rd, int rn,
|
||||
int rm, gen_helper_gvec_3_ptr *fn)
|
||||
{
|
||||
TCGContext *tcg_ctx = s->uc->tcg_ctx;
|
||||
TCGv_ptr qc_ptr = tcg_temp_new_ptr(tcg_ctx);
|
||||
|
||||
tcg_gen_addi_ptr(tcg_ctx, qc_ptr, tcg_ctx->cpu_env, offsetof(CPUARMState, vfp.qc));
|
||||
tcg_gen_gvec_3_ptr(tcg_ctx, vec_full_reg_offset(s, rd),
|
||||
vec_full_reg_offset(s, rn),
|
||||
vec_full_reg_offset(s, rm), qc_ptr,
|
||||
is_q ? 16 : 8, vec_full_reg_size(s), 0, fn);
|
||||
tcg_temp_free_ptr(tcg_ctx, qc_ptr);
|
||||
}
|
||||
|
||||
/* Set ZF and NF based on a 64 bit result. This is alas fiddlier
|
||||
* than the 32 bit equivalent.
|
||||
*/
|
||||
|
@ -12033,6 +12048,15 @@ static void disas_simd_3same_int(DisasContext *s, uint32_t insn)
|
|||
gen_gvec_fn3(s, is_q, rd, rn, rm, gen_gvec_mla, size);
|
||||
}
|
||||
return;
|
||||
case 0x16: /* SQDMULH, SQRDMULH */
|
||||
{
|
||||
static gen_helper_gvec_3_ptr * const fns[2][2] = {
|
||||
{ gen_helper_neon_sqdmulh_h, gen_helper_neon_sqrdmulh_h },
|
||||
{ gen_helper_neon_sqdmulh_s, gen_helper_neon_sqrdmulh_s },
|
||||
};
|
||||
gen_gvec_op3_qc(s, is_q, rd, rn, rm, fns[size - 1][u]);
|
||||
}
|
||||
return;
|
||||
case 0x11:
|
||||
if (!u) { /* CMTST */
|
||||
gen_gvec_fn3(s, is_q, rd, rn, rm, gen_gvec_cmtst, size);
|
||||
|
@ -12144,16 +12168,6 @@ static void disas_simd_3same_int(DisasContext *s, uint32_t insn)
|
|||
genenvfn = fns[size][u];
|
||||
break;
|
||||
}
|
||||
case 0x16: /* SQDMULH, SQRDMULH */
|
||||
{
|
||||
static NeonGenTwoOpEnvFn * const fns[2][2] = {
|
||||
{ gen_helper_neon_qdmulh_s16, gen_helper_neon_qrdmulh_s16 },
|
||||
{ gen_helper_neon_qdmulh_s32, gen_helper_neon_qrdmulh_s32 },
|
||||
};
|
||||
assert(size == 1 || size == 2);
|
||||
genenvfn = fns[size - 1][u];
|
||||
break;
|
||||
}
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
|
|
@ -110,6 +110,30 @@ void HELPER(gvec_qrdmlsh_s16)(void *vd, void *vn, void *vm,
|
|||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
void HELPER(neon_sqdmulh_h)(void *vd, void *vn, void *vm,
|
||||
void *vq, uint32_t desc)
|
||||
{
|
||||
intptr_t i, opr_sz = simd_oprsz(desc);
|
||||
int16_t *d = vd, *n = vn, *m = vm;
|
||||
|
||||
for (i = 0; i < opr_sz / 2; ++i) {
|
||||
d[i] = do_sqrdmlah_h(n[i], m[i], 0, false, false, vq);
|
||||
}
|
||||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
void HELPER(neon_sqrdmulh_h)(void *vd, void *vn, void *vm,
|
||||
void *vq, uint32_t desc)
|
||||
{
|
||||
intptr_t i, opr_sz = simd_oprsz(desc);
|
||||
int16_t *d = vd, *n = vn, *m = vm;
|
||||
|
||||
for (i = 0; i < opr_sz / 2; ++i) {
|
||||
d[i] = do_sqrdmlah_h(n[i], m[i], 0, false, true, vq);
|
||||
}
|
||||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
/* Signed saturating rounding doubling multiply-accumulate high half, 32-bit */
|
||||
static int32_t do_sqrdmlah_s(int32_t src1, int32_t src2, int32_t src3,
|
||||
bool neg, bool round, uint32_t *sat)
|
||||
|
@ -173,6 +197,30 @@ void HELPER(gvec_qrdmlsh_s32)(void *vd, void *vn, void *vm,
|
|||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
void HELPER(neon_sqdmulh_s)(void *vd, void *vn, void *vm,
|
||||
void *vq, uint32_t desc)
|
||||
{
|
||||
intptr_t i, opr_sz = simd_oprsz(desc);
|
||||
int32_t *d = vd, *n = vn, *m = vm;
|
||||
|
||||
for (i = 0; i < opr_sz / 4; ++i) {
|
||||
d[i] = do_sqrdmlah_s(n[i], m[i], 0, false, false, vq);
|
||||
}
|
||||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
void HELPER(neon_sqrdmulh_s)(void *vd, void *vn, void *vm,
|
||||
void *vq, uint32_t desc)
|
||||
{
|
||||
intptr_t i, opr_sz = simd_oprsz(desc);
|
||||
int32_t *d = vd, *n = vn, *m = vm;
|
||||
|
||||
for (i = 0; i < opr_sz / 4; ++i) {
|
||||
d[i] = do_sqrdmlah_s(n[i], m[i], 0, false, true, vq);
|
||||
}
|
||||
clear_tail(d, opr_sz, simd_maxsz(desc));
|
||||
}
|
||||
|
||||
/* Integer 8 and 16-bit dot-product.
|
||||
*
|
||||
* Note that for the loops herein, host endianness does not matter
|
||||
|
|
|
@ -1707,6 +1707,10 @@
|
|||
#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_x86_64
|
||||
#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_x86_64
|
||||
#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_x86_64
|
||||
#define helper_neon_sqdmulh_h helper_neon_sqdmulh_h_x86_64
|
||||
#define helper_neon_sqdmulh_s helper_neon_sqdmulh_s_x86_64
|
||||
#define helper_neon_sqrdmulh_h helper_neon_sqrdmulh_h_x86_64
|
||||
#define helper_neon_sqrdmulh_s helper_neon_sqrdmulh_s_x86_64
|
||||
#define helper_neon_sub_u16 helper_neon_sub_u16_x86_64
|
||||
#define helper_neon_sub_u8 helper_neon_sub_u8_x86_64
|
||||
#define helper_neon_subl_u16 helper_neon_subl_u16_x86_64
|
||||
|
|
Loading…
Reference in a new issue