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header_gen: Fix mips platform
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aaf89ed84d
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f8388a6c03
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_aarch64
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_aarch64
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_aarch64
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_aarch64
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_aarch64
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_aarch64
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_aarch64
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_aarch64eb
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_aarch64eb
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_aarch64eb
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_aarch64eb
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_aarch64eb
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_aarch64eb
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_aarch64eb
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_arm
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_arm
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_arm
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_arm
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_arm
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_arm
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_arm
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_armeb
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_armeb
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_armeb
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_armeb
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_armeb
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_armeb
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_armeb
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@ -2852,7 +2852,6 @@ symbols = (
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'tcg_gen_subfi_i64',
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'tcg_gen_subi_i32',
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'tcg_gen_subi_i64',
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'tcg_gen_trunc_i64_i32',
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'tcg_gen_xor_i32',
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'tcg_gen_xor_i64',
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'tcg_gen_xori_i32',
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_m68k
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_m68k
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_m68k
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_m68k
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_m68k
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_m68k
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_m68k
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_mips
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_mips
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_mips
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_mips
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_mips
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_mips
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_mips
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_mips64
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_mips64
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_mips64
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_mips64
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_mips64
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_mips64
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_mips64
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_mips64el
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_mips64el
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_mips64el
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_mips64el
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_mips64el
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_mips64el
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_mips64el
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_mipsel
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_mipsel
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_mipsel
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_mipsel
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_mipsel
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_mipsel
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_mipsel
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_powerpc
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_powerpc
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_powerpc
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_powerpc
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_powerpc
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_powerpc
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_powerpc
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_sparc
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_sparc
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_sparc
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_sparc
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_sparc
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_sparc
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_sparc
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_sparc64
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_sparc64
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_sparc64
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_sparc64
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_sparc64
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_sparc64
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_sparc64
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@ -16711,7 +16711,7 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
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#if defined(TARGET_MIPS64)
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tcg_gen_ext32s_i64(tcg_ctx, *cpu_gpr[rd], t2);
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#else
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tcg_gen_trunc_i64_i32(tcg_ctx, *cpu_gpr[rd], t2);
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tcg_gen_extrl_i64_i32(tcg_ctx, *cpu_gpr[rd], t2);
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#endif
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tcg_temp_free_i64(tcg_ctx, t2);
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tcg_temp_free(tcg_ctx, t1);
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@ -2846,7 +2846,6 @@
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_x86_64
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_x86_64
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_x86_64
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#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_x86_64
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_x86_64
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_x86_64
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_x86_64
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