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target/i386: simplify handling of conforming code segments on interrupt

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Move the handling of conforming code segments before the handling
of stack switch.

Because dpl == cpl after the new "if", it's now unnecessary to check
the C bit when testing dpl < cpl. Furthermore, dpl > cpl is checked
slightly above the modified code, so the final "else" is unreachable
and we can remove it.

Backports commit 1110bfe6f5600017258fa6578f9c17ec25b32277 from qemu
This commit is contained in:
Paolo Bonzini 2018-03-03 21:19:40 -05:00 committed by Lioncash
parent a8de2d4748
commit f944cf4255
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 10 additions and 18 deletions
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28
qemu/target/i386/seg_helper.c
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@ -678,7 +678,10 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
if (!(e2 & DESC_P_MASK)) { if (!(e2 & DESC_P_MASK)) {
raise_exception_err(env, EXCP0B_NOSEG, selector & 0xfffc); raise_exception_err(env, EXCP0B_NOSEG, selector & 0xfffc);
} }
if (!(e2 & DESC_C_MASK) && dpl < cpl) { if (e2 & DESC_C_MASK) {
dpl = cpl;
}
if (dpl < cpl) {
/* to inner privilege */ /* to inner privilege */
get_ss_esp_from_tss(env, &ss, &esp, dpl, 0); get_ss_esp_from_tss(env, &ss, &esp, dpl, 0);
if ((ss & 0xfffc) == 0) { if ((ss & 0xfffc) == 0) {
@ -705,7 +708,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
new_stack = 1; new_stack = 1;
sp_mask = get_sp_mask(ss_e2); sp_mask = get_sp_mask(ss_e2);
ssp = get_seg_base(ss_e1, ss_e2); ssp = get_seg_base(ss_e1, ss_e2);
} else if ((e2 & DESC_C_MASK) || dpl == cpl) { } else {
/* to same privilege */ /* to same privilege */
if (vm86) { if (vm86) {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
@ -714,13 +717,6 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
sp_mask = get_sp_mask(env->segs[R_SS].flags); sp_mask = get_sp_mask(env->segs[R_SS].flags);
ssp = env->segs[R_SS].base; ssp = env->segs[R_SS].base;
esp = env->regs[R_ESP]; esp = env->regs[R_ESP];
dpl = cpl;
} else {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
new_stack = 0; /* avoid warning */
sp_mask = 0; /* avoid warning */
ssp = 0; /* avoid warning */
esp = 0; /* avoid warning */
} }
shift = type >> 3; shift = type >> 3;
@ -905,25 +901,21 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
if (!(e2 & DESC_L_MASK) || (e2 & DESC_B_MASK)) { if (!(e2 & DESC_L_MASK) || (e2 & DESC_B_MASK)) {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
} }
if ((!(e2 & DESC_C_MASK) && dpl < cpl) || ist != 0) { if (e2 & DESC_C_MASK) {
dpl = cpl;
}
if (dpl < cpl || ist != 0) {
/* to inner privilege */ /* to inner privilege */
new_stack = 1; new_stack = 1;
esp = get_rsp_from_tss(env, ist != 0 ? ist + 3 : dpl); esp = get_rsp_from_tss(env, ist != 0 ? ist + 3 : dpl);
ss = 0; ss = 0;
} else if ((e2 & DESC_C_MASK) || dpl == cpl) { } else {
/* to same privilege */ /* to same privilege */
if (env->eflags & VM_MASK) { if (env->eflags & VM_MASK) {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
} }
new_stack = 0; new_stack = 0;
esp = env->regs[R_ESP]; esp = env->regs[R_ESP];
} else {
raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
new_stack = 0; /* avoid warning */
esp = 0; /* avoid warning */
}
if (e2 & DESC_C_MASK) {
dpl = cpl;
} }
esp &= ~0xfLL; /* align stack */ esp &= ~0xfLL; /* align stack */