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target-mips: Add FCR31's FS bit definition

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Add preprocessor definition of FCR31's FS bit, and update related
code for setting this bit.

Backports commit 77be419980114d75605811e1681115d0919cfa1a from qemu
This commit is contained in:
Aleksandar Markovic 2018-02-24 21:32:07 -05:00 committed by Lioncash
parent 4a540f88de
commit f95e0e9e98
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 1 deletions
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3
qemu/target-mips/cpu.h
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@ -114,6 +114,7 @@ struct CPUMIPSFPUContext {
/* fcsr */
uint32_t fcr31_rw_bitmask;
uint32_t fcr31;
#define FCR31_FS 24
#define FCR31_ABS2008 19
#define FCR31_NAN2008 18
#define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
@ -840,7 +841,7 @@ static inline void restore_rounding_mode(CPUMIPSState *env)
static inline void restore_flush_mode(CPUMIPSState *env)
{
set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0,
set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
&env->active_fpu.fp_status);
}