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target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers

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Rename macros for extracting 3-bit-coded GPR numbers, to achieve
better consistency with the nanoMIPS documentation.

Backports commit 99e49abf119f700bf8664b7dfc60c22d9eaf9159 from qemu
This commit is contained in:
Aleksandar Markovic 2019-01-25 12:43:23 -05:00 committed by Lioncash
parent adecea4679
commit fc2e767e17
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 13 additions and 13 deletions
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26
qemu/target/mips/translate.c
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@ -18573,9 +18573,9 @@ enum {
/* extraction utilities */
#define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7)
#define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7)
#define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7)
#define NANOMIPS_EXTRACT_RT3(op) ((op >> 7) & 0x7)
#define NANOMIPS_EXTRACT_RS3(op) ((op >> 4) & 0x7)
#define NANOMIPS_EXTRACT_RD3(op) ((op >> 1) & 0x7)
#define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f)
#define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f)
@ -18676,8 +18676,8 @@ static void gen_restore(DisasContext *ctx, uint8_t rt, uint8_t count,
static void gen_pool16c_nanomips_insn(DisasContext *ctx)
{
int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode));
int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode));
int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
switch (extract32(ctx->opcode, 2, 2)) {
case NM_NOT16:
@ -21995,9 +21995,9 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
uint32_t op;
int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode));
int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
int rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS1(ctx->opcode));
int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode));
int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
int rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode));
int offset;
int imm;
@ -22154,7 +22154,7 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
break;
case NM_SB16:
rt = decode_gpr_gpr3_src_store(
NANOMIPS_EXTRACT_RD(ctx->opcode));
NANOMIPS_EXTRACT_RT3(ctx->opcode));
gen_st(ctx, OPC_SB, rt, rs, offset);
break;
case NM_LBU16:
@ -22173,7 +22173,7 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
break;
case NM_SH16:
rt = decode_gpr_gpr3_src_store(
NANOMIPS_EXTRACT_RD(ctx->opcode));
NANOMIPS_EXTRACT_RT3(ctx->opcode));
gen_st(ctx, OPC_SH, rt, rs, offset);
break;
case NM_LHU16:
@ -22228,14 +22228,14 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
break;
case NM_SW16:
rt = decode_gpr_gpr3_src_store(
NANOMIPS_EXTRACT_RD(ctx->opcode));
rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
NANOMIPS_EXTRACT_RT3(ctx->opcode));
rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
offset = extract32(ctx->opcode, 0, 4) << 2;
gen_st(ctx, OPC_SW, rt, rs, offset);
break;
case NM_SWGP16:
rt = decode_gpr_gpr3_src_store(
NANOMIPS_EXTRACT_RD(ctx->opcode));
NANOMIPS_EXTRACT_RT3(ctx->opcode));
offset = extract32(ctx->opcode, 0, 7) << 2;
gen_st(ctx, OPC_SW, rt, 28, offset);
break;