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target/arm: Diagnose writeback register in list for LDM for v7

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Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN
value back to the base register. Starting in v7 this is UNPREDICTABLE.

Backports commit 3949f4675d13c587078f8f423845a3a537a22595 from qemu
This commit is contained in:
Richard Henderson 2019-11-20 11:23:14 -05:00 committed by Lioncash
parent a501800ba6
commit fc81b12631
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1 changed files with 9 additions and 0 deletions
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9
qemu/target/arm/translate.c
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@ -10331,6 +10331,15 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a)
static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a) static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a)
{ {
/*
* Writeback register in register list is UNPREDICTABLE
* for ArchVersion() >= 7. Prior to v7, A32 would write
* an UNKNOWN value to the base register.
*/
if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) {
unallocated_encoding(s);
return true;
}
return do_ldm(s, a); return do_ldm(s, a);
} }