arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16

Backports commit b96a54c7e5576bd35b7d00d37b7929d2892d8cac from qemu
This commit is contained in:
Alex Bennée 2018-03-08 21:54:26 -05:00 committed by Lioncash
parent 6102a61b14
commit fdb07713e6
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
6 changed files with 22 additions and 1 deletions

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@ -3770,6 +3770,7 @@
#define helper_crc32_64 helper_crc32_64_aarch64
#define helper_crc32c_64 helper_crc32c_64_aarch64
#define helper_fcvtx_f64_to_f32 helper_fcvtx_f64_to_f32_aarch64
#define helper_frecpx_f16 helper_frecpx_f16_aarch64
#define helper_frecpx_f32 helper_frecpx_f32_aarch64
#define helper_frecpx_f64 helper_frecpx_f64_aarch64
#define helper_neon_addlp_s16 helper_neon_addlp_s16_aarch64
@ -3790,6 +3791,7 @@
#define helper_rsqrtsf_f64 helper_rsqrtsf_f64_aarch64
#define helper_sdiv64 helper_sdiv64_aarch64
#define helper_simd_tbl helper_simd_tbl_aarch64
#define helper_sqrt_f16 helper_sqrt_f16_aarch64
#define helper_udiv64 helper_udiv64_aarch64
#define helper_vfp_cmpd_a64 helper_vfp_cmpd_a64_aarch64
#define helper_vfp_cmped_a64 helper_vfp_cmped_a64_aarch64

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@ -3770,6 +3770,7 @@
#define helper_crc32_64 helper_crc32_64_aarch64eb
#define helper_crc32c_64 helper_crc32c_64_aarch64eb
#define helper_fcvtx_f64_to_f32 helper_fcvtx_f64_to_f32_aarch64eb
#define helper_frecpx_f16 helper_frecpx_f16_aarch64eb
#define helper_frecpx_f32 helper_frecpx_f32_aarch64eb
#define helper_frecpx_f64 helper_frecpx_f64_aarch64eb
#define helper_neon_addlp_s16 helper_neon_addlp_s16_aarch64eb
@ -3790,6 +3791,7 @@
#define helper_rsqrtsf_f64 helper_rsqrtsf_f64_aarch64eb
#define helper_sdiv64 helper_sdiv64_aarch64eb
#define helper_simd_tbl helper_simd_tbl_aarch64eb
#define helper_sqrt_f16 helper_sqrt_f16_aarch64eb
#define helper_udiv64 helper_udiv64_aarch64eb
#define helper_vfp_cmpd_a64 helper_vfp_cmpd_a64_aarch64eb
#define helper_vfp_cmped_a64 helper_vfp_cmped_a64_aarch64eb

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@ -3811,6 +3811,7 @@ aarch64_symbols = (
'helper_rsqrtsf_f64',
'helper_sdiv64',
'helper_simd_tbl',
'helper_sqrt_f16',
'helper_udiv64',
'helper_vfp_cmpd_a64',
'helper_vfp_cmped_a64',

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@ -874,3 +874,14 @@ uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp)
}
return float16_to_uint16(a, fpst);
}
/*
* Square Root and Reciprocal square root
*/
float16 HELPER(sqrt_f16)(float16 a, void *fpstp)
{
float_status *s = fpstp;
return float16_sqrt(a, s);
}

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@ -76,4 +76,4 @@ DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr)
DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
DEF_HELPER_2(sqrt_f16, f16, f16, ptr)

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@ -11544,6 +11544,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
need_fpst = false;
break;
case 0x7f: /* FSQRT (vector) */
break;
default:
fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
g_assert_not_reached();
@ -11657,6 +11659,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
tcg_gen_xori_i32(tcg_ctx, tcg_res, tcg_op, 0x8000);
break;
case 0x7f: /* FSQRT */
gen_helper_sqrt_f16(tcg_ctx, tcg_res, tcg_op, tcg_fpstatus);
break;
default:
g_assert_not_reached();
}