unicorn/qemu/target
Peter Maydell 55bc017af4
target/arm: Emit barriers for A32/T32 load-acquire/store-release insns
Now that MTTCG is here, the comment in the 32-bit Arm decoder that
"Since the emulation does not have barriers, the acquire/release
semantics need no special handling" is no longer true. Emit the
correct barriers for the load-acquire/store-release insns, as
we already do in the A64 decoder.

Backports commit 96c552958dbb63453b5f02bea6e704006d50e39a from qemu
2019-01-13 19:48:27 -05:00
..
arm target/arm: Emit barriers for A32/T32 load-acquire/store-release insns 2019-01-13 19:48:27 -05:00
i386 i386: Add stibp flag name 2018-12-18 03:48:53 -05:00
m68k m68k: Silence compiler warnings 2018-11-16 21:23:55 -05:00
mips target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions 2019-01-05 08:07:56 -05:00
sparc Sparc increase ttl number 2018-10-06 04:55:52 -04:00