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unicorn/qemu
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Peter Maydell 059f238f11
target/arm: Factor out "get mmuidx for specified security state" 
For the SG instruction and secure function return we are going
to want to do memory accesses using the MMU index of the CPU
in secure state, even though the CPU is currently in non-secure
state. Write arm_v7m_mmu_idx_for_secstate() to do this job,
and use it in cpu_mmu_index().

Backports commit b81ac0eb6315e602b18439961e0538538e4aed4f from qemu
2018-03-05 02:00:23 -05:00
..
accel target/arm: [tcg] Port to generic translation framework 2018-03-04 20:28:06 -05:00
crypto
default-configs
docs
fpu softfloat: define floatx80_round() 2018-03-03 20:57:27 -05:00
hw mips: replace cpu_mips_init() with cpu_generic_init() 2018-03-05 00:49:10 -05:00
include qom: provide root container for internal objs 2018-03-05 01:16:50 -05:00
qapi qapi: add explicit null to string input and output visitors 2018-03-03 20:32:50 -05:00
qobject qnum: add uint type 2018-03-03 18:37:56 -05:00
qom qom: provide root container for internal objs 2018-03-05 01:16:50 -05:00
scripts scripts: use build_ prefix for string not piped through cgen() 2018-03-03 22:11:28 -05:00
target target/arm: Factor out "get mmuidx for specified security state" 2018-03-05 02:00:23 -05:00
tcg tcg/mips: Fully convert tcg_target_op_def 2018-03-04 23:54:26 -05:00
util bitmap: provide to_le/from_le helpers 2018-03-05 01:11:13 -05:00
aarch64.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
aarch64eb.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
armeb.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
atomic_template.h tcg: Add atomic128 helpers 2018-02-27 21:43:48 -05:00
CODING_STYLE
configure configure: Drop AIX host support 2018-03-04 21:32:40 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c tcg: Add EXCP_ATOMIC 2018-02-27 11:57:58 -05:00
cpu-exec.c tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h 2018-03-04 21:52:35 -05:00
cpus.c tcg: handle EXCP_ATOMIC exception for system emulation 2018-03-02 09:56:43 -05:00
cputlb.c cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
exec.c memory: Open code FlatView rendering 2018-03-04 02:06:48 -05:00
gen_all_header.sh
glib_compat.c qapi: Improve qobject input visitor error reporting 2018-03-02 12:05:53 -05:00
HACKING
header_gen.py target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE
m68k.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
Makefile Makefile: Add a FORCE target 2018-02-24 17:03:51 -05:00
Makefile.objs tcg: Add atomic helpers 2018-02-27 15:57:47 -05:00
Makefile.target tcg: Add generic translation framework 2018-03-04 14:31:16 -05:00
memory.c memory: avoid a name clash with access macro 2018-03-05 01:13:01 -05:00
memory_ldst.inc.c exec: introduce memory_ldst.inc.c 2018-03-01 09:59:34 -05:00
memory_mapping.c
mips.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
mips64.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
mips64el.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
mipsel.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
powerpc.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
rules.mak rules.mak: Don't extract libs from .mo-libs in link command 2018-02-26 02:08:03 -05:00
softmmu_template.h cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
sparc.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
sparc64.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00
tcg-runtime.c tcg: Increase hit rate of lookup_tb_ptr 2018-03-03 17:16:23 -05:00
translate-all.c tcg: Infrastructure for managing constant pools 2018-03-04 22:17:33 -05:00
translate-all.h translate-all.c: Compute L1 page table properties at runtime 2018-02-26 11:46:58 -05:00
translate-common.c
unicorn_common.h
VERSION
vl.c util: add cacheinfo 2018-03-03 16:58:28 -05:00
vl.h
x86_64.h target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode 2018-03-05 01:29:54 -05:00