mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 18:45:27 +00:00
b2f1326437
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu
491 lines
15 KiB
C
491 lines
15 KiB
C
/*
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* VIS op helpers
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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/* This function uses non-native bit order */
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#define GET_FIELD(X, FROM, TO) \
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((X) >> (63 - (TO)) & ((1ULL << ((TO) - (FROM) + 1)) - 1))
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/* This function uses the order in the manuals, i.e. bit 0 is 2^0 */
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#define GET_FIELD_SP(X, FROM, TO) \
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GET_FIELD(X, 63 - (TO), 63 - (FROM))
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target_ulong helper_array8(target_ulong pixel_addr, target_ulong cubesize)
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{
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return (GET_FIELD_SP(pixel_addr, 60, 63) << (17 + 2 * cubesize)) |
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(GET_FIELD_SP(pixel_addr, 39, 39 + cubesize - 1) << (17 + cubesize)) |
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(GET_FIELD_SP(pixel_addr, 17 + cubesize - 1, 17) << 17) |
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(GET_FIELD_SP(pixel_addr, 56, 59) << 13) |
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(GET_FIELD_SP(pixel_addr, 35, 38) << 9) |
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(GET_FIELD_SP(pixel_addr, 13, 16) << 5) |
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(((pixel_addr >> 55) & 1) << 4) |
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(GET_FIELD_SP(pixel_addr, 33, 34) << 2) |
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GET_FIELD_SP(pixel_addr, 11, 12);
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}
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#ifdef HOST_WORDS_BIGENDIAN
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#define VIS_B64(n) b[7 - (n)]
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#define VIS_W64(n) w[3 - (n)]
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#define VIS_SW64(n) sw[3 - (n)]
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#define VIS_L64(n) l[1 - (n)]
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#define VIS_B32(n) b[3 - (n)]
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#define VIS_W32(n) w[1 - (n)]
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#else
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#define VIS_B64(n) b[n]
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#define VIS_W64(n) w[n]
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#define VIS_SW64(n) sw[n]
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#define VIS_L64(n) l[n]
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#define VIS_B32(n) b[n]
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#define VIS_W32(n) w[n]
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#endif
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typedef union {
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uint8_t b[8];
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uint16_t w[4];
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int16_t sw[4];
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uint32_t l[2];
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uint64_t ll;
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float64 d;
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} VIS64;
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typedef union {
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uint8_t b[4];
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uint16_t w[2];
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uint32_t l;
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float32 f;
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} VIS32;
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uint64_t helper_fpmerge(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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s.ll = src1;
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d.ll = src2;
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/* Reverse calculation order to handle overlap */
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d.VIS_B64(7) = s.VIS_B64(3);
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d.VIS_B64(6) = d.VIS_B64(3);
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d.VIS_B64(5) = s.VIS_B64(2);
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d.VIS_B64(4) = d.VIS_B64(2);
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d.VIS_B64(3) = s.VIS_B64(1);
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d.VIS_B64(2) = d.VIS_B64(1);
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d.VIS_B64(1) = s.VIS_B64(0);
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/* d.VIS_B64(0) = d.VIS_B64(0); */
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return d.ll;
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}
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uint64_t helper_fmul8x16(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmul8x16al(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(1) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmul8x16au(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(0) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmul8sux16(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmul8ulx16(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmuld8sux16(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_L64(r) = tmp;
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/* Reverse calculation order to handle overlap */
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PMUL(1);
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PMUL(0);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fmuld8ulx16(uint64_t src1, uint64_t src2)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.ll = src1;
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d.ll = src2;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_L64(r) = tmp;
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/* Reverse calculation order to handle overlap */
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PMUL(1);
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PMUL(0);
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#undef PMUL
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return d.ll;
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}
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uint64_t helper_fexpand(uint64_t src1, uint64_t src2)
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{
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VIS32 s;
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VIS64 d;
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s.l = (uint32_t)src1;
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d.ll = src2;
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d.VIS_W64(0) = s.VIS_B32(0) << 4;
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d.VIS_W64(1) = s.VIS_B32(1) << 4;
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d.VIS_W64(2) = s.VIS_B32(2) << 4;
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d.VIS_W64(3) = s.VIS_B32(3) << 4;
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return d.ll;
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}
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#define VIS_HELPER(name, F) \
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uint64_t name##16(uint64_t src1, uint64_t src2) \
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{ \
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VIS64 s, d; \
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\
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s.ll = src1; \
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d.ll = src2; \
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\
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d.VIS_W64(0) = F(d.VIS_W64(0), s.VIS_W64(0)); \
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d.VIS_W64(1) = F(d.VIS_W64(1), s.VIS_W64(1)); \
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d.VIS_W64(2) = F(d.VIS_W64(2), s.VIS_W64(2)); \
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d.VIS_W64(3) = F(d.VIS_W64(3), s.VIS_W64(3)); \
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\
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return d.ll; \
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} \
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\
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uint32_t name##16s(uint32_t src1, uint32_t src2) \
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{ \
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VIS32 s, d; \
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\
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s.l = src1; \
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d.l = src2; \
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\
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d.VIS_W32(0) = F(d.VIS_W32(0), s.VIS_W32(0)); \
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d.VIS_W32(1) = F(d.VIS_W32(1), s.VIS_W32(1)); \
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\
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return d.l; \
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} \
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\
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uint64_t name##32(uint64_t src1, uint64_t src2) \
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{ \
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VIS64 s, d; \
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\
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s.ll = src1; \
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d.ll = src2; \
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\
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d.VIS_L64(0) = F(d.VIS_L64(0), s.VIS_L64(0)); \
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d.VIS_L64(1) = F(d.VIS_L64(1), s.VIS_L64(1)); \
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\
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return d.ll; \
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} \
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\
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uint32_t name##32s(uint32_t src1, uint32_t src2) \
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{ \
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VIS32 s, d; \
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\
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s.l = src1; \
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d.l = src2; \
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\
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d.l = F(d.l, s.l); \
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\
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return d.l; \
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}
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#define FADD(a, b) ((a) + (b))
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#define FSUB(a, b) ((a) - (b))
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VIS_HELPER(helper_fpadd, FADD)
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VIS_HELPER(helper_fpsub, FSUB)
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#define VIS_CMPHELPER(name, F) \
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uint64_t name##16(uint64_t src1, uint64_t src2) \
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{ \
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VIS64 s, d; \
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\
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s.ll = src1; \
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d.ll = src2; \
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\
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d.VIS_W64(0) = F(s.VIS_W64(0), d.VIS_W64(0)) ? 1 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(1), d.VIS_W64(1)) ? 2 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(2), d.VIS_W64(2)) ? 4 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(3), d.VIS_W64(3)) ? 8 : 0; \
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d.VIS_W64(1) = d.VIS_W64(2) = d.VIS_W64(3) = 0; \
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\
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return d.ll; \
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} \
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\
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uint64_t name##32(uint64_t src1, uint64_t src2) \
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{ \
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VIS64 s, d; \
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\
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s.ll = src1; \
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d.ll = src2; \
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\
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d.VIS_L64(0) = F(s.VIS_L64(0), d.VIS_L64(0)) ? 1 : 0; \
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d.VIS_L64(0) |= F(s.VIS_L64(1), d.VIS_L64(1)) ? 2 : 0; \
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d.VIS_L64(1) = 0; \
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\
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return d.ll; \
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}
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#define FCMPGT(a, b) ((a) > (b))
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#define FCMPEQ(a, b) ((a) == (b))
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#define FCMPLE(a, b) ((a) <= (b))
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#define FCMPNE(a, b) ((a) != (b))
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VIS_CMPHELPER(helper_fcmpgt, FCMPGT)
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VIS_CMPHELPER(helper_fcmpeq, FCMPEQ)
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VIS_CMPHELPER(helper_fcmple, FCMPLE)
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VIS_CMPHELPER(helper_fcmpne, FCMPNE)
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uint64_t helper_pdist(uint64_t sum, uint64_t src1, uint64_t src2)
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{
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int i;
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for (i = 0; i < 8; i++) {
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int s1, s2;
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s1 = (src1 >> (56 - (i * 8))) & 0xff;
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s2 = (src2 >> (56 - (i * 8))) & 0xff;
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/* Absolute value of difference. */
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s1 -= s2;
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if (s1 < 0) {
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s1 = -s1;
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}
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sum += s1;
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}
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return sum;
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}
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uint32_t helper_fpack16(uint64_t gsr, uint64_t rs2)
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{
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int scale = (gsr >> 3) & 0xf;
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uint32_t ret = 0;
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int byte;
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for (byte = 0; byte < 4; byte++) {
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uint32_t val;
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int16_t src = rs2 >> (byte * 16);
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int32_t scaled = src << scale;
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int32_t from_fixed = scaled >> 7;
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val = (from_fixed < 0 ? 0 :
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from_fixed > 255 ? 255 : from_fixed);
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ret |= val << (8 * byte);
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}
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return ret;
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}
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uint64_t helper_fpack32(uint64_t gsr, uint64_t rs1, uint64_t rs2)
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{
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int scale = (gsr >> 3) & 0x1f;
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uint64_t ret = 0;
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int word;
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ret = (rs1 << 8) & ~(0x000000ff000000ffULL);
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for (word = 0; word < 2; word++) {
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uint64_t val;
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int32_t src = rs2 >> (word * 32);
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int64_t scaled = (int64_t)src << scale;
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int64_t from_fixed = scaled >> 23;
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val = (from_fixed < 0 ? 0 :
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(from_fixed > 255) ? 255 : from_fixed);
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ret |= val << (32 * word);
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}
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return ret;
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}
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uint32_t helper_fpackfix(uint64_t gsr, uint64_t rs2)
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{
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int scale = (gsr >> 3) & 0x1f;
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uint32_t ret = 0;
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int word;
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for (word = 0; word < 2; word++) {
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uint32_t val;
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int32_t src = rs2 >> (word * 32);
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int64_t scaled = (int64_t)src << scale;
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int64_t from_fixed = scaled >> 16;
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val = (from_fixed < -32768 ? -32768 :
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from_fixed > 32767 ? 32767 : from_fixed);
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ret |= (val & 0xffff) << (word * 16);
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}
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return ret;
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}
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uint64_t helper_bshuffle(uint64_t gsr, uint64_t src1, uint64_t src2)
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{
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union {
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uint64_t ll[2];
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uint8_t b[16];
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} s;
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VIS64 r;
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uint32_t i, mask, host;
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/* Set up S such that we can index across all of the bytes. */
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#ifdef HOST_WORDS_BIGENDIAN
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s.ll[0] = src1;
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s.ll[1] = src2;
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host = 0;
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#else
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s.ll[1] = src1;
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s.ll[0] = src2;
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host = 15;
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#endif
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mask = gsr >> 32;
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for (i = 0; i < 8; ++i) {
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unsigned e = (mask >> (28 - i*4)) & 0xf;
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r.VIS_B64(i) = s.b[e ^ host];
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}
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return r.ll;
|
|
}
|