Michael Davidsaver 09d69209a0 armv7m: Classify faults as MemManage or BusFault ... General logic is that operations stopped by the MPU are MemManage, and those which go through the MPU and are caught by the unassigned handle are BusFault. Distinguish these by looking at the exception.fsr values, and set the CFSR bits and (if appropriate) fill in the BFAR or MMFAR with the exception address. Backports commit 5dd0641d234e355597be62e5279d8a519c831625 from qemu		2018-03-02 19:28:21 -05:00
..
arm	armv7m: Classify faults as MemManage or BusFault	2018-03-02 19:28:21 -05:00
i386	i386: Don't override -cpu options on -cpu host/max	2018-03-02 14:22:45 -05:00
m68k	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
mips	target/mips: fix delay slot detection in gen_msa_branch()	2018-03-02 14:15:50 -05:00
sparc	cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap	2018-03-02 10:12:40 -05:00