Peter Maydell 118a2bde5c target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions ... Instead of gating the A32/T32 FP16 conversion instructions on the ARM_FEATURE_VFP_FP16 flag, switch to our new approach of looking at ID register bits. In this case MVFR1 fields FPHP and SIMDHP indicate the presence of these insns. This change doesn't alter behaviour for any of our CPUs. Backports commit 602f6e42cfbfe9278be34e9b91d2ceb695837e02 from qemu		2019-02-28 15:23:51 -05:00
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arm	target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions	2019-02-28 15:23:51 -05:00
i386	Revert "i386: Add CPUID bit for PCONFIG"	2019-02-07 08:56:40 -05:00
m68k	target/m68k: Fix LGPL information in the file headers	2019-02-03 17:55:29 -05:00
mips	target/mips: reimplement SC instruction emulation and use cmpxchg	2019-02-15 17:10:16 -05:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00