unicorn/qemu/target
Peter Maydell 14cb6925f3
target/arm: Make FAULTMASK register banked for v8M
Make the FAULTMASK register banked if v8M security extensions are enabled.

Note that we do not yet implement the functionality of the new
AIRCR.PRIS bit (which allows the effect of the NS copy of FAULTMASK to
be restricted).

This patch includes the code to determine for v8M which copy
of FAULTMASK should be updated on exception exit; further
changes will be required to the exception exit code in general
to support v8M, so this is just a small piece of that.

The v8M ARM ARM introduces a notation where individual paragraphs
are labelled with R (for rule) or I (for information) followed
by a random group of subscript letters. In comments where we want
to refer to a particular part of the manual we use this convention,
which should be more stable across document revisions than using
section or page numbers.

Backports commit 42a6686b2f6199d086a58edd7731faeb2dbe7c14 from qemu
2018-03-04 20:58:38 -05:00
..
arm target/arm: Make FAULTMASK register banked for v8M 2018-03-04 20:58:38 -05:00
i386 target/i386: Remove unnecessary unicorn hooking code in i386_tr_init_disas_context 2018-03-04 20:31:07 -05:00
m68k gen-icount: check cflags instead of use_icount global 2018-03-04 14:26:26 -05:00
mips gen-icount: check cflags instead of use_icount global 2018-03-04 14:26:26 -05:00
sparc gen-icount: check cflags instead of use_icount global 2018-03-04 14:26:26 -05:00