unicorn/qemu/target
Peter Maydell 16c0c2d253
target/arm: Factor out code to calculate FSR for debug exceptions
When a debug exception is taken to AArch32, it appears as a Prefetch
Abort, and the Instruction Fault Status Register (IFSR) must be set.
The IFSR has two possible formats, depending on whether LPAE is in
use. Factor out the code in arm_debug_excp_handler() which picks
an FSR value into its own utility function, update it to use
arm_fi_to_lfsc() and arm_fi_to_sfsc() rather than hard-coded constants,
and use the correct condition to select long or short format.

In particular this fixes a bug where we could select the short
format because we're at EL0 and the EL1 translation regime is
not using LPAE, but then route the debug exception to EL2 because
of MDCR_EL2.TDE and hand EL2 the wrong format FSR.

Backports commit 81621d9ab8a0f07956e67850b15eebf6d6992eec from qemu
2018-03-25 16:35:27 -04:00
..
arm target/arm: Factor out code to calculate FSR for debug exceptions 2018-03-25 16:35:27 -04:00
i386 cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
m68k cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
mips cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
sparc cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00