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unicorn/qemu/target
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Onur Sahin 18e6b1549f
target-arm: Check undefined opcodes for SWP in A32 decoder 
Make sure we are not treating architecturally Undefined instructions
as a SWP, by verifying the opcodes as per section A8.8.229 of ARMv7-A
specification. Bits [21:20] must be zero for this to be a SWP or SWPB.
We also choose to UNDEF for the architecturally UNPREDICTABLE case of
bits [11:8] not being zero.

Backports commit c4869ca630a57f4269bb932ec7f719cef5bc79b8 from qemu
2018-04-11 19:30:50 -04:00
..
arm target-arm: Check undefined opcodes for SWP in A32 decoder 2018-04-11 19:30:50 -04:00
i386 Add missing bit for SSE instr in VEX decoding 2018-04-10 08:49:15 -04:00
m68k cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
mips cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
sparc cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00