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unicorn/qemu/target/riscv/insn_trans
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Alistair Francis 2584ab8ee5 target/riscv: Drop support for ISA spec version 1.09.1 
The RISC-V ISA spec version 1.09.1 has been deprecated in QEMU since
4.1. It's not commonly used so let's remove support for it.

Backports commit 1a9540d1f1a9c5022d9273d0244e5809679dd33b from qemu
2020-06-14 22:23:26 -04:00
..
trans_privileged.inc.c target/riscv: Drop support for ISA spec version 1.09.1 2020-06-14 22:23:26 -04:00
trans_rva.inc.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
trans_rvd.inc.c target/riscv: fsd/fsw doesn't dirty FP state 2020-03-21 12:20:52 -04:00
trans_rvf.inc.c target/riscv: fsd/fsw doesn't dirty FP state 2020-03-21 12:20:52 -04:00
trans_rvi.inc.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
trans_rvm.inc.c target/riscv: Zero extend the inputs of divuw and remuw 2019-03-26 20:38:17 -04:00