Richard Henderson 1df7314dc3 target/arm: Convert aes and sm4 to gvec helpers ... With this conversion, we will be able to use the same helpers with sve. In particular, pass 3 vector parameters for the 3-operand operations; for advsimd the destination register is also an input. This also fixes a bug in which we failed to clear the high bits of the SVE register after an AdvSIMD operation. Backports commit a04b68e1d4c4f0cd5cd7542697b1b230b84532f5 from qemu		2020-06-14 22:41:33 -04:00
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arm	target/arm: Convert aes and sm4 to gvec helpers	2020-06-14 22:41:33 -04:00
i386	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00
m68k	target/m68k: implement opcode fetoxm1	2020-06-14 21:13:29 -04:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Add the lowRISC Ibex CPU	2020-06-14 22:28:55 -04:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00