Peter Maydell 6c8b7e0fed target-arm: Honour NS bits in page tables ... Honour the NS bit in ARM page tables: * when adding entries to the TLB, include the Secure/NonSecure transaction attribute * set the NS bit in the PAR when doing ATS operations Note that we don't yet correctly use the NSTable bit to cause the page table walk itself to use the right attributes. Backports commit 8bf5b6a9c1911d2c8473385fc0cebfaaeef42dbc from qem		2018-02-12 20:36:35 -05:00
..
address-spaces.h	import	2015-08-21 15:04:50 +08:00
cpu-all.h	import	2015-08-21 15:04:50 +08:00
cpu-common.h	delete qemu/include/exec/poison.h	2017-01-20 13:58:50 +08:00
cpu-defs.h	Add MemTxAttrs to the IOTLB	2018-02-12 18:38:38 -05:00
cpu_ldst.h	cpu_ldst.h: Allow NB_MMU_MODES to be 7	2018-02-12 11:21:19 -05:00
cpu_ldst_template.h	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
cputlb.h	exec: make iotlb RCU-friendly	2018-02-12 15:20:39 -05:00
exec-all.h	Add MemTxAttrs to the IOTLB	2018-02-12 18:38:38 -05:00
gen-icount.h	tcg: Change translator-side labels to a pointer	2018-02-09 14:17:56 -05:00
helper-gen.h	import	2015-08-21 15:04:50 +08:00
helper-head.h	import	2015-08-21 15:04:50 +08:00
helper-proto.h	import	2015-08-21 15:04:50 +08:00
helper-tcg.h	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
hwaddr.h	platform.h move #3	2017-01-21 00:13:21 +11:00
ioport.h	import	2015-08-21 15:04:50 +08:00
memattrs.h	target-arm: Honour NS bits in page tables	2018-02-12 20:36:35 -05:00
memory-internal.h	import	2015-08-21 15:04:50 +08:00
memory.h	exec.c: Add new address_space_ld*/st* functions	2018-02-12 19:22:47 -05:00
ram_addr.h	we dont need to handle VGA & Migration memories	2017-01-20 17:03:39 +08:00