unicorn/qemu/target
Michael Davidsaver 2297b8134b
armv7m: honour CCR.STACKALIGN on exception entry
The CCR.STACKALIGN bit controls whether the CPU is supposed to force
8-alignment of the stack pointer on entry to the exception handler.

Backports commit dc858c6633a9af8b80c1509cf6f825e4390d3ad1 from qemu
2018-03-02 13:45:06 -05:00
..
arm armv7m: honour CCR.STACKALIGN on exception entry 2018-03-02 13:45:06 -05:00
i386 i386: Change stepping of Haswell to non-blacklisted value 2018-03-02 12:53:11 -05:00
m68k Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
mips target-mips: Provide function to test if a CPU supports an ISA 2018-03-02 08:20:19 -05:00
sparc cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap 2018-03-02 10:12:40 -05:00