Yang Zhong 258b885b17 x86/cpu: Enable new SSE/AVX/AVX512 cpu features ... Intel IceLake cpu has added new cpu features,AVX512_VBMI2/GFNI/ VAES/VPCLMULQDQ/AVX512_VNNI/AVX512_BITALG. Those new cpu features need expose to guest VM. The bit definition: CPUID.(EAX=7,ECX=0):ECX[bit 06] AVX512_VBMI2 CPUID.(EAX=7,ECX=0):ECX[bit 08] GFNI CPUID.(EAX=7,ECX=0):ECX[bit 09] VAES CPUID.(EAX=7,ECX=0):ECX[bit 10] VPCLMULQDQ CPUID.(EAX=7,ECX=0):ECX[bit 11] AVX512_VNNI CPUID.(EAX=7,ECX=0):ECX[bit 12] AVX512_BITALG The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf Backports commit aff9e6e46a343e1404498be4edd03db1112f0950 from qemu		2018-03-05 14:19:37 -05:00
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arm	target/arm: Extend PAR format determination	2018-03-05 14:08:50 -05:00
i386	x86/cpu: Enable new SSE/AVX/AVX512 cpu features	2018-03-05 14:19:37 -05:00
m68k	qom: Introduce CPUClass.tcg_initialize	2018-03-05 09:49:26 -05:00
mips	qom: Introduce CPUClass.tcg_initialize	2018-03-05 09:49:26 -05:00
sparc	qom: Introduce CPUClass.tcg_initialize	2018-03-05 09:49:26 -05:00