Peter Maydell 272427b4a0 target/arm: Support some Thumb insns being always unconditional ... A few Thumb instructions are always unconditional even inside an IT block (as opposed to being UNPREDICTABLE if used inside an IT block): BKPT, the v8M SG instruction, and the A profile HLT (debug halt) instruction. This means we need to suppress the jump-over-instruction-on-condfail code generation (though the IT state still advances as usual and subsequent insns in the IT block may be conditional). Backports commit dcf14dfb704519846f396a376339ebdb93eaf049 from qemu		2018-03-05 03:46:10 -05:00
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arm	target/arm: Support some Thumb insns being always unconditional	2018-03-05 03:46:10 -05:00
i386	tcg: remove addr argument from lookup_tb_ptr	2018-03-05 02:16:34 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	tcg: remove addr argument from lookup_tb_ptr	2018-03-05 02:16:34 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00