unicorn/qemu/cpus.c
Emilio G. Cota 23a55a277f
tcg: enable multiple TCG contexts in softmmu
This enables parallel TCG code generation. However, we do not take
advantage of it yet since tb_lock is still held during tb_gen_code.

In user-mode we use a single TCG context; see the documentation
added to tcg_region_init for the rationale.

Note that targets do not need any conversion: targets initialize a
TCGContext (e.g. defining TCG globals), and after this initialization
has finished, the context is cloned by the vCPU threads, each of
them keeping a separate copy.

TCG threads claim one entry in tcg_ctxs[] by atomically increasing
n_tcg_ctxs. Do not be too annoyed by the subsequent atomic_read's
of that variable and tcg_ctxs; they are there just to play nice with
analysis tools such as thread sanitizer.

Note that we do not allocate an array of contexts (we allocate
an array of pointers instead) because when tcg_context_init
is called, we do not know yet how many contexts we'll use since
the bool behind qemu_tcg_mttcg_enabled() isn't set yet.

Previous patches folded some TCG globals into TCGContext. The non-const
globals remaining are only set at init time, i.e. before the TCG
threads are spawned. Here is a list of these set-at-init-time globals
under tcg/:

Only written by tcg_context_init:
- indirect_reg_alloc_order
- tcg_op_defs
Only written by tcg_target_init (called from tcg_context_init):
- tcg_target_available_regs
- tcg_target_call_clobber_regs
- arm: arm_arch, use_idiv_instructions
- i386: have_cmov, have_bmi1, have_bmi2, have_lzcnt,
have_movbe, have_popcnt
- mips: use_movnz_instructions, use_mips32_instructions,
use_mips32r2_instructions, got_sigill (tcg_target_detect_isa)
- ppc: have_isa_2_06, have_isa_3_00, tb_ret_addr
- s390: tb_ret_addr, s390_facilities
- sparc: qemu_ld_trampoline, qemu_st_trampoline (build_trampolines),
use_vis3_instructions

Only written by tcg_prologue_init:
- 'struct jit_code_entry one_entry'
- aarch64: tb_ret_addr
- arm: tb_ret_addr
- i386: tb_ret_addr, guest_base_flags
- ia64: tb_ret_addr
- mips: tb_ret_addr, bswap32_addr, bswap32u_addr, bswap64_addr

Backports commit 3468b59e18b179bc63c7ce934de912dfa9596122 from qemu
2018-03-14 14:32:34 -04:00

239 lines
5.7 KiB
C

/*
* QEMU System Emulator
*
* Copyright (c) 2003-2008 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
#include "exec/exec-all.h"
#include "tcg.h"
#include "qemu/thread.h"
#include "sysemu/cpus.h"
#include "exec/address-spaces.h" // debug, can be removed later
#include "uc_priv.h"
static bool cpu_can_run(CPUState *cpu);
static void cpu_handle_guest_debug(CPUState *cpu);
static int tcg_cpu_exec(struct uc_struct *uc, CPUState *cpu);
static bool tcg_exec_all(struct uc_struct* uc);
static int qemu_tcg_init_vcpu(CPUState *cpu);
static void *qemu_tcg_cpu_loop(struct uc_struct *uc);
static bool default_mttcg_enabled(void)
{
return false;
}
void qemu_tcg_configure(struct uc_struct *uc)
{
uc->mttcg_enabled = default_mttcg_enabled();
}
int vm_start(struct uc_struct* uc)
{
if (resume_all_vcpus(uc)) {
return -1;
}
return 0;
}
bool cpu_is_stopped(CPUState *cpu)
{
return cpu->stopped;
}
void run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data)
{
func(cpu, data);
}
int resume_all_vcpus(struct uc_struct *uc)
{
CPUState *cpu = uc->cpu;
// Fix call multiple time (vu).
// We have to check whether this is the second time, then reset all CPU.
if (!cpu->created) {
cpu->created = true;
cpu->halted = 0;
if (qemu_init_vcpu(cpu))
return -1;
}
//qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true);
cpu_resume(cpu);
qemu_tcg_cpu_loop(uc);
return 0;
}
int qemu_init_vcpu(CPUState *cpu)
{
cpu->nr_cores = smp_cores;
cpu->nr_threads = smp_threads;
cpu->stopped = true;
if (!cpu->as) {
/* If the target cpu hasn't set up any address spaces itself,
* give it the default one.
*/
cpu->num_ases = 1;
cpu_address_space_init(cpu, 0, "cpu-memory", cpu->memory);
}
if (tcg_enabled(cpu->uc)) {
return qemu_tcg_init_vcpu(cpu);
}
return 0;
}
static void *qemu_tcg_cpu_loop(struct uc_struct *uc)
{
CPUState *cpu = uc->cpu;
//qemu_tcg_init_cpu_signals();
cpu->created = true;
while (1) {
if (tcg_exec_all(uc))
break;
}
cpu->created = false;
return NULL;
}
static int qemu_tcg_init_vcpu(CPUState *cpu)
{
return 0;
}
static int tcg_cpu_exec(struct uc_struct *uc, CPUState *cpu)
{
return cpu_exec(uc, cpu);
}
static bool tcg_exec_all(struct uc_struct* uc)
{
int r;
bool finish = false;
while (!uc->cpu->exit_request) {
CPUState *cpu = uc->cpu;
CPUArchState *env = cpu->env_ptr;
//qemu_clock_enable(QEMU_CLOCK_VIRTUAL,
// (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);
if (cpu_can_run(cpu)) {
uc->quit_request = false;
r = tcg_cpu_exec(uc, cpu);
// quit current TB but continue emulating?
if (uc->quit_request) {
// reset stop_request
uc->stop_request = false;
} else if (uc->stop_request) {
finish = true;
break;
}
// save invalid memory access error & quit
if (env->invalid_error) {
uc->invalid_addr = env->invalid_addr;
uc->invalid_error = env->invalid_error;
finish = true;
break;
}
if (r == EXCP_DEBUG) {
cpu_handle_guest_debug(cpu);
break;
}
if (r == EXCP_HLT) {
finish = true;
break;
} else if (r == EXCP_ATOMIC) {
cpu_exec_step_atomic(uc, cpu);
}
} else if (cpu->stop) {
printf(">>> got stopped!!!\n");
break;
}
}
if (uc->cpu && uc->cpu->exit_request) {
atomic_mb_set(&uc->cpu->exit_request, 0);
}
return finish;
}
static bool cpu_can_run(CPUState *cpu)
{
if (cpu->stop) {
return false;
}
if (cpu_is_stopped(cpu)) {
return false;
}
return true;
}
static void cpu_handle_guest_debug(CPUState *cpu)
{
cpu->stopped = true;
}
#if 0
#ifndef _WIN32
static void qemu_tcg_init_cpu_signals(void)
{
sigset_t set;
struct sigaction sigact;
memset(&sigact, 0, sizeof(sigact));
sigact.sa_handler = cpu_signal;
sigaction(SIG_IPI, &sigact, NULL);
sigemptyset(&set);
sigaddset(&set, SIG_IPI);
pthread_sigmask(SIG_UNBLOCK, &set, NULL);
}
#else /* _WIN32 */
static void qemu_tcg_init_cpu_signals(void)
{
}
#endif /* _WIN32 */
#endif