Maciej W. Rozycki 29cd1237ba target-mips: Correct 32-bit address space wrapping ... Make sure the address space is unconditionally wrapped on 32-bit processors, that is ones that do not implement at least the MIPS III ISA. Also make MIPS16 SAVE and RESTORE instructions use address calculation rather than plain arithmetic operations for stack pointer manipulation so that their semantics for stack accesses follows the architecture specification. That in particular applies to user software run on 64-bit processors with the CP0.Status.UX bit clear where the address space is wrapped to 32 bits. Backports commit c48245f0c62405f27266fcf08722d8c290520418 from qemu		2018-02-11 16:47:12 -05:00
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cpu-qom.h	remove slow cpu QOM casts (#815)	2017-05-02 14:56:39 +08:00
cpu.c	Fix for MIPS issue. (#733)	2017-01-23 12:39:34 +08:00
cpu.h	target-mips: Correct 32-bit address space wrapping	2018-02-11 16:47:12 -05:00
dsp_helper.c	Added MIPS support and projects for all samples.	2017-01-23 01:05:08 +11:00
helper.c	target-mips: Tighten ISA level checks	2018-02-11 16:37:17 -05:00
helper.h	target-mips: Fix CP0.Config3.ISAOnExc write accesses	2018-02-11 16:24:19 -05:00
lmi_helper.c	import	2015-08-21 15:04:50 +08:00
Makefile.objs	import	2015-08-21 15:04:50 +08:00
mips-defs.h	import	2015-08-21 15:04:50 +08:00
msa_helper.c	Added MIPS support and projects for all samples.	2017-01-23 01:05:08 +11:00
op_helper.c	target-mips: Fix CP0.Config3.ISAOnExc write accesses	2018-02-11 16:24:19 -05:00
TODO	import	2015-08-21 15:04:50 +08:00
translate.c	target-mips: Correct 32-bit address space wrapping	2018-02-11 16:47:12 -05:00
translate_init.c	target-mips: assorted formatting fixes	2018-02-11 16:01:23 -05:00
unicorn.c	Merge branch 'master' into msvc2	2017-04-21 01:17:00 +08:00
unicorn.h	armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition.	2017-03-15 22:25:35 +08:00