unicorn/qemu/target
Peter Maydell 3cc3099e36 target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations
In the gvec helper functions for indexed operations, for AArch32
Neon the oprsz (total size of the vector) can be less than 16 bytes
if the operation is on a D reg. Since the inner loop in these
helpers always goes from 0 to segment, we must clamp it based
on oprsz to avoid processing a full 16 byte segment when asked to
handle an 8 byte wide vector.

Backports commit d7ce81e553e6789bf27657105b32575668d60b1c
2021-03-01 17:48:42 -05:00
..
arm target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations 2021-03-01 17:48:42 -05:00
i386 target/i386: floatx80: avoid compound literals in static initializers 2021-02-25 23:38:54 -05:00
m68k target/m68k: consolidate physical translation offset into get_physical_address() 2021-02-25 23:13:48 -05:00
mips target/mips: Support variable page size 2020-06-14 21:09:51 -04:00
riscv target/riscv: vector single-width integer multiply instructions 2021-02-26 10:46:26 -05:00
sparc softfloat: Name compare relation enum 2020-05-21 18:08:52 -04:00