Peter Maydell 3da3a3fb41 target/arm: Add v8M support to exception entry code ... Add support for v8M and in particular the security extension to the exception entry code. This requires changes to: * calculation of the exception-return magic LR value * push the callee-saves registers in certain cases * clear registers when taking non-secure exceptions to avoid leaking information from the interrupted secure code * switch to the correct security state on entry * use the vector table for the security state we're targeting Backports commit d3392718e1fcf0859fb7c0774a8e946bacb8419c from qemu		2018-03-05 01:51:22 -05:00
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arm	target/arm: Add v8M support to exception entry code	2018-03-05 01:51:22 -05:00
i386	i386/cpu/hyperv: support over 64 vcpus for windows guests	2018-03-05 00:00:53 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00