Richard Henderson 4a58a81e31 target/arm: Convert division from feature bits to isar0 tests ... Both arm and thumb2 division are controlled by the same ISAR field, which takes care of the arm implies thumb case. Having M imply thumb2 division was wrong for cortex-m0, which is v6m and does not have thumb2 at all, much less thumb2 division. Backports commit 7e0cf8b47f0e67cebbc3dfa73f304e56ad1a090f from qemu		2018-11-10 08:21:02 -05:00
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arm	target/arm: Convert division from feature bits to isar0 tests	2018-11-10 08:21:02 -05:00
i386	target/i386: Convert to HAVE_CMPXCHG128	2018-10-23 15:21:03 -04:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	target/mips: Add opcodes for nanoMIPS EVA instructions	2018-10-23 14:33:08 -04:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00