Peter Maydell 4b8bdda695 target/arm: Implement MSR/MRS access to NS banked registers ... In v8M the MSR and MRS instructions have extra register value encodings to allow secure code to access the non-secure banked version of various special registers. (We don't implement the MSPLIM_NS or PSPLIM_NS aliases, because we don't currently implement the stack limit registers at all.) Backports commit 50f11062d4c896408731d6a286bcd116d1e08465 from qemu		2018-03-05 00:53:13 -05:00
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arm	target/arm: Implement MSR/MRS access to NS banked registers	2018-03-05 00:53:13 -05:00
i386	i386/cpu/hyperv: support over 64 vcpus for windows guests	2018-03-05 00:00:53 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00