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unicorn/qemu
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Peter Maydell 4ea6fdc986
target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr 
Shifting a negative integer left is undefined behaviour in C.
Avoid it by assembling and shifting the offset fields as
unsigned values and then sign extending as the final action.

Backports commit 037e1d009e2fcb80784d37f0e12aa999787d46d4 from qemu
2018-02-12 15:04:03 -05:00
..
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs cleanup qemu docs 2017-01-18 15:23:40 +08:00
fpu softfloat: expand out STATUS macro 2018-02-12 13:43:13 -05:00
hw Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
include softfloat: expand out STATUS macro 2018-02-12 13:43:13 -05:00
qapi This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qobject This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qom cleanup after msvc port 2017-01-22 21:27:17 +08:00
scripts Save copies of generated qapi files. 2017-01-21 00:30:50 +11:00
target-arm target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr 2018-02-12 15:04:03 -05:00
target-i386 target-i386: make xmm_regs 512-bit wide 2018-02-12 12:38:43 -05:00
target-m68k target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-mips softfloat: expand out STATUS_VAR 2018-02-12 13:36:42 -05:00
target-sparc target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
tcg tcg: Allow extra data to be attached to insn_start 2018-02-11 13:03:51 -05:00
util Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
aarch64.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
aarch64eb.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
accel.c Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
arm.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
armeb.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpu-exec.c Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
cpus.c cleanup more synchronization code 2017-01-09 14:05:39 +08:00
cputlb.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
exec.c fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
HACKING import 2015-08-21 15:04:50 +08:00
header_gen.py target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
ioport.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
Makefile cleanup qemu/default-configs/ 2017-01-19 14:52:30 +08:00
Makefile.objs cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory.c merge msvc with master 2017-02-24 10:39:36 +08:00
memory_mapping.c revert to use of g_free to make future qemu integrations easier (#695) 2016-12-21 22:28:36 +08:00
mips.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
mips64.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
mips64el.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
mipsel.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
powerpc.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
qapi-schema.json import 2015-08-21 15:04:50 +08:00
qemu-log.c import 2015-08-21 15:04:50 +08:00
qemu-timer.c timer is redundant 2017-01-20 16:46:58 +08:00
rules.mak import 2015-08-21 15:04:50 +08:00
softmmu_template.h tcg: Add MO_ALIGN, MO_UNALN 2018-02-10 20:18:53 -05:00
sparc.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
sparc64.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
tcg-runtime.c platform.h move #3 2017-01-21 00:13:21 +11:00
translate-all.c target-mips: Correct MIPS16/microMIPS branch size calculation 2018-02-11 16:09:33 -05:00
translate-all.h import 2015-08-21 15:04:50 +08:00
unicorn_common.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
VERSION import 2015-08-21 15:04:50 +08:00
vl.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00