Richard Henderson 4ef4735cd3 target/arm: Introduce PREDDESC field definitions ... SVE predicate operations cannot use the "usual" simd_desc encoding, because the lengths are not a multiple of 8. But we were abusing the SIMD_* fields to store values anyway. This abuse broke when SIMD_OPRSZ_BITS was modified in e2e7168a214. Introduce a new set of field definitions for exclusive use of predicates, so that it is obvious what kind of predicate we are manipulating. To be used in future patches Backports b64ee454a4a086ed459bcda4c0bbb54e197841e4		2021-03-04 15:08:32 -05:00
..
accel	tcg/optimize: Use tcg_constant_internal with constant folding	2021-03-04 12:15:58 -05:00
crypto
default-configs	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
docs
fpu	softfloat: Define misc operations for bfloat16	2021-02-27 16:41:46 -05:00
hw	target/arm: Set instance_align on CPUARM TypeInfo	2021-03-01 18:58:44 -05:00
include	target/arm: Implement an IMPDEF pauth algorithm	2021-03-04 13:38:22 -05:00
qapi
qobject
qom	target/arm: Set instance_align on CPUARM TypeInfo	2021-03-01 18:58:44 -05:00
scripts	decodetree: Open files with encoding='utf-8'	2021-03-04 13:34:08 -05:00
target	target/arm: Introduce PREDDESC field definitions	2021-03-04 15:08:32 -05:00
tcg	tcg: Remove tcg_gen_dup{8,16,32,64}i_vec	2021-03-04 13:32:32 -05:00
util	util/cutils: Turn FIXME comment into QEMU_BUILD_BUG_ON()	2020-01-14 08:04:30 -05:00
aarch64.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
aarch64eb.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
accel.c	target/arm: Set instance_align on CPUARM TypeInfo	2021-03-01 18:58:44 -05:00
arm.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
armeb.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
CODING_STYLE.rst	docs: split the CODING_STYLE doc into distinct groups	2019-11-28 02:54:44 -05:00
configure	configure: Support -static-pie if requested	2020-04-30 07:09:34 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c	Memory: Enable writeback for given memory region	2020-01-14 07:44:24 -05:00
gen_all_header.sh
glib_compat.c	tcg: Introduce TYPE_CONST temporaries	2021-03-03 21:29:40 -05:00
header_gen.py	tcg: Remove tcg_gen_dup{8,16,32,64}i_vec	2021-03-04 13:32:32 -05:00
ioport.c	hw: remove pio_addr_t	2018-02-24 02:43:16 -05:00
LICENSE
m68k.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
Makefile	Makefile: Rename targets for make recursion	2019-08-08 17:26:49 -04:00
Makefile.objs
Makefile.target
memory.c	target/arm: Set instance_align on CPUARM TypeInfo	2021-03-01 18:58:44 -05:00
memory_ldst.inc.c	memory: Single byte swap along the I/O path	2020-01-07 19:12:04 -05:00
memory_mapping.c
mips.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
mips64.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
mips64el.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
mipsel.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
powerpc.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
qemu-timer.c
riscv32.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
riscv64.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
rules.mak
sparc.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
sparc64.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00
unicorn_common.h	tcg: Move sorted_args into TCGArgConstraint.sort_index	2021-03-01 19:33:45 -05:00
VERSION	Open 6.0 development tree	2021-03-02 13:39:05 -05:00
vl.c
vl.h
x86_64.h	tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders	2021-03-04 13:05:25 -05:00