Peter Maydell 56b54f361e target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions ... Currently the only part of an ARMCPRegInfo which is allowed to cause a CPU exception is the access function, which returns a value indicating that some flavour of UNDEF should be generated. For the ATS system instructions, we would like to conditionally generate exceptions as part of the writefn, because some faults during the page table walk (like external aborts) should cause an exception to be raised rather than returning a value. There are several ways we could do this: * plumb the GETPC() value from the top level set_cp_reg/get_cp_reg helper functions through into the readfn and writefn hooks * add extra readfn_with_ra/writefn_with_ra hooks that take the GETPC() value * require the ATS instructions to provide a dummy accessfn, which serves no purpose except to cause the code generation to emit TCG ops to sync the CPU state * add an ARM_CP_ flag to mark the ARMCPRegInfo as possibly throwing an exception in its read/write hooks, and make the codegen sync the CPU state before calling the hooks if the flag is set This patch opts for the last of these, as it is fairly simple to implement and doesn't require invasive changes like updating the readfn/writefn hook function prototype signature. Backports commit 37ff584c15bc3e1dd2c26b1998f00ff87189538c from qemu		2019-11-20 17:24:37 -05:00
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arm	target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions	2019-11-20 17:24:37 -05:00
i386	x86: Intel AVX512_BF16 feature enabling	2019-11-18 22:06:57 -05:00
m68k	target/m68k: replace LIT64 with UINT64_C macros	2019-11-18 21:05:59 -05:00
mips	target/mips: Fix emulation of ST.W in system mode	2019-11-18 23:47:33 -05:00
riscv	target/riscv: Remove redundant declaration pragmas	2019-11-18 21:22:09 -05:00
sparc	configure: Define target access alignment in configure	2019-11-18 21:41:35 -05:00