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560515941a
Commit 2afbdf8 ("target-i386: exception handling for memory helpers", 2015-09-15) changed tlb_fill's cpu_restore_state+raise_exception_err to raise_exception_err_ra. After this change, the cpu_restore_state and raise_exception_err's cpu_loop_exit are merged into raise_exception_err_ra's cpu_loop_exit_restore. This actually fixed some bugs, but when SVM is enabled there is a second path from raise_exception_err_ra to cpu_loop_exit. This is the VMEXIT path, and now cpu_vmexit is called without a cpu_restore_state before. The fix is to pass the retaddr to cpu_vmexit (via cpu_svm_check_intercept_param). All helpers can now use GETPC() to pass the correct retaddr, too. Backports commit 823fb688ebc52a7d79c1308acb28c92b56820167 from qemu
141 lines
4.5 KiB
C
141 lines
4.5 KiB
C
/*
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* x86 exception helpers
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "qemu/log.h"
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#include "sysemu/sysemu.h"
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#include "exec/helper-proto.h"
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#include "uc_priv.h"
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void helper_raise_interrupt(CPUX86State *env, int intno, int next_eip_addend)
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{
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raise_interrupt(env, intno, 1, 0, next_eip_addend);
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}
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void helper_raise_exception(CPUX86State *env, int exception_index)
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{
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raise_exception(env, exception_index);
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}
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/*
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* Check nested exceptions and change to double or triple fault if
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* needed. It should only be called, if this is not an interrupt.
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* Returns the new exception number.
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*/
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static int check_exception(CPUX86State *env, int intno, int *error_code,
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uintptr_t retaddr)
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{
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int first_contributory = env->old_exception == 0 ||
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(env->old_exception >= 10 &&
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env->old_exception <= 13);
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int second_contributory = intno == 0 ||
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(intno >= 10 && intno <= 13);
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qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n",
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env->old_exception, intno);
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#if !defined(CONFIG_USER_ONLY)
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if (env->old_exception == EXCP08_DBLE) {
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if (env->hflags & HF_SVMI_MASK) {
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cpu_vmexit(env, SVM_EXIT_SHUTDOWN, 0, retaddr); /* does not return */
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}
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qemu_log_mask(CPU_LOG_RESET, "Triple fault\n");
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qemu_system_reset_request(env->uc);
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return EXCP_HLT;
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}
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#endif
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if ((first_contributory && second_contributory)
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|| (env->old_exception == EXCP0E_PAGE &&
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(second_contributory || (intno == EXCP0E_PAGE)))) {
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intno = EXCP08_DBLE;
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*error_code = 0;
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}
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if (second_contributory || (intno == EXCP0E_PAGE) ||
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(intno == EXCP08_DBLE)) {
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env->old_exception = intno;
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}
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return intno;
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}
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/*
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* Signal an interruption. It is executed in the main CPU loop.
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* is_int is TRUE if coming from the int instruction. next_eip is the
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* env->eip value AFTER the interrupt instruction. It is only relevant if
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* is_int is TRUE.
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*/
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static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
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int is_int, int error_code,
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int next_eip_addend,
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uintptr_t retaddr)
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{
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CPUState *cs = CPU(x86_env_get_cpu(env));
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if (!is_int) {
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cpu_svm_check_intercept_param(env, SVM_EXIT_EXCP_BASE + intno,
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error_code, retaddr);
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intno = check_exception(env, intno, &error_code, retaddr);
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} else {
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cpu_svm_check_intercept_param(env, SVM_EXIT_SWINT, 0, retaddr);
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}
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cs->exception_index = intno; // qq
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env->error_code = error_code;
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env->exception_is_int = is_int;
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env->exception_next_eip = env->eip + next_eip_addend;
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cpu_loop_exit_restore(cs, retaddr);
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}
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/* shortcuts to generate exceptions */
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void QEMU_NORETURN raise_interrupt(CPUX86State *env, int intno, int is_int,
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int error_code, int next_eip_addend)
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{
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raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0);
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}
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void raise_exception_err(CPUX86State *env, int exception_index,
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int error_code)
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{
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raise_interrupt2(env, exception_index, 0, error_code, 0, 0);
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}
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void raise_exception_err_ra(CPUX86State *env, int exception_index,
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int error_code, uintptr_t retaddr)
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{
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raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr);
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}
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void raise_exception(CPUX86State *env, int exception_index)
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{
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raise_interrupt2(env, exception_index, 0, 0, 0, 0);
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}
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void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr)
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{
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raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
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}
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