unicorn/qemu/include
Laurent Vivier c15ddf11dd softfloat,m68k: disable floatx80_invalid_encoding() for m68k
According to the comment, this definition of invalid encoding is given
by intel developer's manual, and doesn't comply with 680x0 FPU.

With m68k, the explicit integer bit can be zero in the case of:
- zeros (exp == 0, mantissa == 0)
- denormalized numbers (exp == 0, mantissa != 0)
- unnormalized numbers (exp != 0, exp < 0x7FFF)
- infinities (exp == 0x7FFF, mantissa == 0)
- not-a-numbers (exp == 0x7FFF, mantissa != 0)

For infinities and NaNs, the explicit integer bit can be either one or
zero.

The IEEE 754 standard does not define a zero integer bit. Such a number
is an unnormalized number. Hardware does not directly support
denormalized and unnormalized numbers, but implicitly supports them by
trapping them as unimplemented data types, allowing efficient conversion
in software.

See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL",
"1.6 FLOATING-POINT DATA TYPES"

We will implement in the m68k TCG emulator the FP_UNIMP exception to
trap into the kernel to normalize the number. In case of linux-user,
the number will be normalized by QEMU.

Backports commit d159dd058c7dc48a9291fde92eaae52a9f26a4d1 from qemu
2021-02-25 23:14:47 -05:00
..
crypto Drop unused crypto source files 2018-02-17 15:23:57 -05:00
exec target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
fpu softfloat,m68k: disable floatx80_invalid_encoding() for m68k 2021-02-25 23:14:47 -05:00
hw target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qemu osdep.h: Drop no-longer-needed Coverity workarounds 2020-04-30 07:27:24 -04:00
qom cputlb: Handle watchpoints via TLB_WATCHPOINT 2020-01-14 06:58:33 -05:00
sysemu accel: Remove unused AccelClass::available field 2019-05-03 11:31:27 -04:00
config.h import 2015-08-21 15:04:50 +08:00
elf.h include/elf: Update elf.h to commit f71a8eaffba3271cf7cdad95572f6996f7523a5b 2018-03-11 15:34:35 -04:00
glib_compat.h target/arm: Add VHE system register redirection and aliasing 2020-03-21 15:57:03 -04:00
qemu-common.h tcg: Add EXCP_ATOMIC 2018-02-27 11:57:58 -05:00