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Alex Bennée 639c5c4fe2 target/arm: ensure we use current exception state after SCR update 
A write to the SCR can change the effective EL by droppping the system
from secure to non-secure mode. However if we use a cached current_el
from before the change we'll rebuild the flags incorrectly. To fix
this we introduce the ARM_CP_NEWEL CP flag to indicate the new EL
should be used when recomputing the flags.

Backports partof commit f80741d107673f162e3b097fc76a1590036cc9d1 from
qemu
2020-01-14 07:51:10 -05:00
..
arm target/arm: ensure we use current exception state after SCR update 2020-01-14 07:51:10 -05:00
i386 tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
m68k tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
mips target/mips: Hard code size with MO_{8|16|32|64} 2020-01-07 18:30:39 -05:00
riscv tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
sparc target/sparc: sun4u Invert Endian TTE bit 2020-01-07 19:21:30 -05:00